Patents by Inventor Yi Lung Liu

Yi Lung Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11967272
    Abstract: A sweep voltage generator and a display panel are provided. The sweep voltage generator includes an output node, a current generating block and a voltage regulating block. The output node is used to provide a sweep signal. The current generating block is coupled to the output node, includes a detection path for detecting an output load variation on the output node, and adjusts the sweep signal provided by the output node based on the output load variation. The voltage regulating block is coupled to the output node for regulating a voltage of the output node.
    Type: Grant
    Filed: December 9, 2022
    Date of Patent: April 23, 2024
    Assignees: AUO Corporation, National Cheng-Kung University
    Inventors: Chih-Lung Lin, Yi-Chen Huang, Chih-I Liu, Po-Cheng Lai, Ming-Yang Deng, Chia-En Wu, Ming-Hung Chuang, Chia-Tien Peng
  • Patent number: 11933309
    Abstract: A method for controlling a fan in a fan start-up stage including a first time period and a second time period comprises the following steps of: during the first time period, continuously providing a first driving signal to drive the fan; and during the second time period, continuously providing a second driving signal to drive the fan; wherein, the signal value of the first driving signal gradually decreases until being equal to the signal value of the second driving signal. Wherein the signal value of the first driving signal non-linearly decreases, the signal value of the second driving signal is an unchanged value. Wherein, the first time period and the second time period are adjusted for a different fan but the sum of the first time period and the second time period is always the same. A fan is also disclosed.
    Type: Grant
    Filed: July 22, 2022
    Date of Patent: March 19, 2024
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Yi-Fan Lin, Chung-Hung Tang, Cheng-Chieh Liu, Chun-Lung Chiu
  • Patent number: 11923225
    Abstract: A method includes initiating a gas flow of a first gas parallel to a wall of an interface module to create an air curtain across an opening defined in the wall. The method includes moving an interface door to reveal the opening, wherein the air curtain restrains a second gas within the interface module from passing through the opening. The method includes transferring a semiconductor wafer through the opening and moving the interface door to cover the opening. The method includes halting the gas flow of the first gas after moving the interface door to cover the opening.
    Type: Grant
    Filed: August 16, 2021
    Date of Patent: March 5, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED
    Inventors: Yi-Fam Shiu, Cheng-Lung Wu, Yang-Ann Chu, Hsu-Shui Liu, Jiun-Rong Pai
  • Patent number: 9011638
    Abstract: A method of chip sorting comprises providing a chip holder having a first surface; providing multiple chips on the first surface; providing a chip receiver having a second surface, wherein the second surface faces the first surface; attaching the multiple chips to the second surface; decreasing an adhesion between the multiple chips and the first surface; and separating the multiple chips from the first surface after the step of decreasing the adhesion between the multiple chips and the first surface.
    Type: Grant
    Filed: March 19, 2014
    Date of Patent: April 21, 2015
    Assignee: Epistar Corporation
    Inventors: Chen-Ke Hsu, Liang Sheng Chi, Chun-Chang Chen, Win-Jim Su, Hsu-Cheng Lin, Mei-Ling Tsai, Yi Lung Liu, Chen Ou
  • Publication number: 20140202627
    Abstract: A method of chip sorting comprises providing a chip holder having a first surface; providing multiple chips on the first surface; providing a chip receiver having a second surface, wherein the second surface faces the first surface; attaching the multiple chips to the second surface; decreasing an adhesion between the multiple chips and the first surface; and separating the multiple chips from the first surface after the step of decreasing the adhesion between the multiple chips and the first surface.
    Type: Application
    Filed: March 19, 2014
    Publication date: July 24, 2014
    Applicant: EPISTAR CORPORATION
    Inventors: Chen-Ke HSU, Liang Sheng CHI, Chun-Chang CHEN, Win-Jim SU, Hsu-Cheng LIN, Mei-Ling TSAI, Yi Lung LIU, Chen OU
  • Patent number: 8714227
    Abstract: A chip sorting apparatus comprising a chip holder comprising a first surface and an second surface opposite to the first surface; a wafer comprising a first chip disposed on a first position of the first surface; a first chip receiver comprising a third surface and an fourth surface opposite to the third surface, wherein the third surface is opposite to the first surface; a pressurization device making the first chip and the third surface of the first chip receiver adhered to each other through pressuring the second surface at where corresponding to the first position; and a separator decreasing the adhesion between the first chip and the first surface.
    Type: Grant
    Filed: July 23, 2010
    Date of Patent: May 6, 2014
    Assignee: Epistar Corporation
    Inventors: Chen-Ke Hsu, Liang-Sheng Chi, Chun-Chang Chen, Win-Jim Su, Hsu-Cheng Lin, Mei-Ling Tsai, Yi Lung Liu, Chen Ou
  • Publication number: 20110017407
    Abstract: A chip sorting apparatus comprising a chip holder comprising a first surface and an second surface opposite to the first surface; a wafer comprising a first chip disposed on a first position of the first surface; a first chip receiver comprising a third surface and an fourth surface opposite to the third surface, wherein the third surface is opposite to the first surface; a pressurization device making the first chip and the third surface of the first chip receiver adhered to each other through pressuring the second surface at where corresponding to the first position; and a separator decreasing the adhesion between the first chip and the first surface.
    Type: Application
    Filed: July 23, 2010
    Publication date: January 27, 2011
    Inventors: Chen-Ke Hsu, Liang-Sheng Chi, Chun-Chang Chen, Win-Jim Su, Hsu-Cheng Lin, Mei-Ling Tsai, Yi Lung Liu, Chen Ou