Patents by Inventor Yi-Ming Dai

Yi-Ming Dai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11081341
    Abstract: The present disclosure provides an apparatus for fabricating a semiconductor device with target sputtering, including a chamber for accommodating a consumable target, a target accumulative consumption counter, wherein the target accumulative consumption counter provides a signal correlated to an amount of the consumable target being consumed, and a power supply communicates with the consumable target counter, wherein the power supply provides a power output according to the signal.
    Type: Grant
    Filed: March 12, 2019
    Date of Patent: August 3, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Shih Wei Bih, Yen-Yu Chen, Yi-Ming Dai
  • Patent number: 11075179
    Abstract: A method for forming a bond pad structure includes forming an interconnect structure on a semiconductor device, forming a passivation layer on the interconnect structure, forming at least one opening through the passivation layer, forming an oxidation layer at least in the opening, and forming a pad metal layer on the oxidation layer. A portion of the interconnect structure is exposed by the at least one opening.
    Type: Grant
    Filed: June 3, 2019
    Date of Patent: July 27, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Wen-Hao Cheng, Yen-Yu Chen, Chih-Wei Lin, Yi-Ming Dai
  • Publication number: 20210189561
    Abstract: A thin film deposition system deposits a thin film on a substrate in a thin film deposition chamber. The thin film deposition system deposits the thin film by flowing a fluid into the thin film deposition chamber. The thin film deposition system includes a byproducts sensor that senses byproducts of the fluid in an exhaust fluid. The thin film deposition system adjusts the flow rate of the fluid based on the byproducts.
    Type: Application
    Filed: November 24, 2020
    Publication date: June 24, 2021
    Inventors: Wen-Hao CHENG, Yi-Ming DAI, Yen-Yu CHEN, Hsuan-Chih CHU
  • Publication number: 20210115554
    Abstract: The present disclosure provides a multifunction chamber having a multifunctional shutter disk. The shutter disk includes a lamp device, a DC/RF power device, and a gas line on one surface of the shutter disk. With this configuration, simplifying the chamber type is possible as the various specific, dedicated chambers such as a degas chamber, a pre-clean chamber, a CVD/PVD chamber are not required. By using the multifunctional shutter disk, the degassing function and the pre-cleaning function are provided within a single chamber. Accordingly, a separate degas chamber and a pre-clean chamber are no longer required and the overall transfer time between chambers is reduced or eliminated.
    Type: Application
    Filed: October 18, 2019
    Publication date: April 22, 2021
    Inventors: Wen-Hao Cheng, Yen-Yu Chen, Yi-Ming Dai
  • Publication number: 20210118700
    Abstract: The present disclosure provides a flexible workpiece pedestal capable of tilting a workpiece support surface. The workpiece pedestal further includes a heater mounted on the workpiece support surface. The heater includes a plurality of heating sources such as heating coils. The plurality of heating sources in the heater allows heating the workpiece at different temperatures for different zones of the workpiece. For example, the workpiece can have a central zone heated by a first heating coil, a first outer ring zone that is outside of the central zone heated by a second heating coil, a second outer ring zone that is outside of the first outer ring zone heated by a third heating coil. By using the tunable heating feature and the tilting feature of the workpiece pedestal, the present disclosure can reduce or eliminate the shadowing effect problem of the related workpiece pedestal in the art.
    Type: Application
    Filed: October 18, 2019
    Publication date: April 22, 2021
    Inventors: Hsuan-Chih Chu, Wen-Hao Cheng, Yen-Yu Chen, Yi-Ming Dai
  • Publication number: 20200402828
    Abstract: A scanner includes a light source configured to apply a light to a backside of a wafer. The light is reflected from the backside of the wafer. A first mirror is configured to receive the light from the backside of the wafer and reflect the light. A sensor is configured to receive the light from the first mirror and generate an output signal indicative of a backside topography of the wafer.
    Type: Application
    Filed: September 8, 2020
    Publication date: December 24, 2020
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Cheng-Mu Lin, Chi-Hung Liao, Yi-Ming Dai, Yueh Lin Yang
  • Patent number: 10770327
    Abstract: A scanner includes a light source configured to apply a light to a backside of a wafer. The light is reflected from the backside of the wafer. A first mirror is configured to receive the light from the backside of the wafer and reflect the light. A sensor is configured to receive the light from the first mirror and generate an output signal indicative of a backside topography of the wafer.
    Type: Grant
    Filed: March 30, 2018
    Date of Patent: September 8, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Cheng-Mu Lin, Chi-Hung Liao, Yi-Ming Dai, Yueh Lin Yang
  • Publication number: 20200251365
    Abstract: A method for fault detection in a fabrication facility is provided. The method includes moving a wafer carrier along a predetermined path multiple times using a transportation apparatus. The method also includes collecting data associated with an environmental condition within the wafer carrier or around the wafer carrier using a metrology tool on the predetermined path in a previous movement of the transportation apparatus. The method further includes measuring the environmental condition within the wafer carrier or around the wafer carrier using the metrology tool during the movement of the wafer carrier. In addition, the method includes issuing a warning when the measured environmental condition is outside a range of acceptable values. The range of acceptable values is derived from the data collected in the previous movement of the transportation apparatus.
    Type: Application
    Filed: April 24, 2020
    Publication date: August 6, 2020
    Inventors: Powen HUANG, Yao-Yuan SHANG, Kuo-Shu TSENG, Yen-Yu CHEN, Chun-Chih LIN, Yi-Ming DAI
  • Patent number: 10651066
    Abstract: A method for fault detection in a fabrication facility is provided. The method includes moving a wafer carrier using a transportation apparatus. The method further includes measuring an environmental condition within the wafer carrier or around the wafer carrier using a metrology tool positioned on the wafer carrier during the movement of the wafer carrier. The method also includes issuing a warning when the detected environmental condition is outside a range of acceptable values.
    Type: Grant
    Filed: January 25, 2018
    Date of Patent: May 12, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Powen Huang, Yao-Yuan Shang, Kuo-Shu Tseng, Yen-Yu Chen, Chun-Chih Lin, Yi-Ming Dai
  • Publication number: 20200075518
    Abstract: A method for forming a bond pad structure includes forming an interconnect structure on a semiconductor device, forming a passivation layer on the interconnect structure, forming at least one opening through the passivation layer, forming an oxidation layer at least in the opening, and forming a pad metal layer on the oxidation layer. A portion of the interconnect structure is exposed by the at least one opening.
    Type: Application
    Filed: June 3, 2019
    Publication date: March 5, 2020
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Wen-Hao CHENG, Yen-Yu CHEN, Chih-Wei LIN, Yi-Ming DAI
  • Publication number: 20200035487
    Abstract: The present disclosure provides an apparatus for fabricating a semiconductor device with target sputtering, including a chamber for accommodating a consumable target, a target accumulative consumption counter, wherein the target accumulative consumption counter provides a signal correlated to an amount of the consumable target being consumed, and a power supply communicates with the consumable target counter, wherein the power supply provides a power output according to the signal.
    Type: Application
    Filed: March 12, 2019
    Publication date: January 30, 2020
    Inventors: SHIH WEI BIH, YEN-YU CHEN, YI-MING DAI
  • Patent number: 10345716
    Abstract: A method for fault detection in a fabrication system is provided. The method includes transferring a reticle carrier containing a reticle from an original position to a destination position. The method further includes detecting environmental condition in the reticle carrier during the transfer of the reticle carrier using a metrology tool that is positioned at the reticle carrier. The method also includes issuing a warning when the detected environmental condition is outside a range of acceptable values.
    Type: Grant
    Filed: January 23, 2018
    Date of Patent: July 9, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yao-Yuan Shang, Kuo-Shu Tseng, Yen-Yu Chen, Chun-Chih Lin, Yi-Ming Dai
  • Publication number: 20190163070
    Abstract: A method for fault detection in a fabrication system is provided. The method includes transferring a reticle carrier containing a reticle from an original position to a destination position. The method further includes detecting environmental condition in the reticle carrier during the transfer of the reticle carrier using a metrology tool that is positioned at the reticle carrier. The method also includes issuing a warning when the detected environmental condition is outside a range of acceptable values.
    Type: Application
    Filed: January 23, 2018
    Publication date: May 30, 2019
    Inventors: Yao-Yuan SHANG, Kuo-Shu TSENG, Yen-Yu CHEN, Chun-Chih LIN, Yi-Ming DAI
  • Publication number: 20190164792
    Abstract: A method for fault detection in a fabrication facility is provided. The method includes moving a wafer carrier using a transportation apparatus. The method further includes measuring an environmental condition within the wafer carrier or around the wafer carrier using a metrology tool positioned on the wafer carrier during the movement of the wafer carrier. The method also includes issuing a warning when the detected environmental condition is outside a range of acceptable values.
    Type: Application
    Filed: January 25, 2018
    Publication date: May 30, 2019
    Inventors: Powen HUANG, Yao-Yuan SHANG, Kuo-Shu TSENG, Yen-Yu CHEN, Chun-Chih LIN, Yi-Ming DAI
  • Publication number: 20190035664
    Abstract: A scanner includes a light source configured to apply a light to a backside of a wafer. The light is reflected from the backside of the wafer. A first mirror is configured to receive the light from the backside of the wafer and reflect the light. A sensor is configured to receive the light from the first mirror and generate an output signal indicative of a backside topography of the wafer.
    Type: Application
    Filed: March 30, 2018
    Publication date: January 31, 2019
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Cheng-Mu Lin, Chi-Hung Liao, Yi-Ming Dai, Yueh Lin Yang
  • Patent number: 9811000
    Abstract: A photolithography tool includes at least one process chamber, at least one front opening unified pod (FOUP) stage, at least one moving mechanism, and an image sensor. The moving mechanism is configured to move the wafer from the process chamber to the FOUP stage. The image sensor is configured to capture the image of the wafer on the moving mechanism.
    Type: Grant
    Filed: October 30, 2015
    Date of Patent: November 7, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chia-Feng Liao, Chun-Hsien Lin, Pei-Yi Su, Yi-Ming Dai, Chung-Hsing Lee, Chien-Ko Liao, Chun-Yung Chang, Nan-Jung Chen, Pei-Yuan Wu, Hsien-Mao Huang
  • Patent number: 9707571
    Abstract: A method of providing a liquid over a substrate is provided. The method includes providing the liquid over the substrate via a first opening of a flow path formed in a spray nozzle. The method further includes sucking back the liquid away from the first opening of the flow path. The method also includes holding the chemical solution in the flow path to keep a front surface of the chemical solution located in a tapered flow path section of the flow path.
    Type: Grant
    Filed: December 30, 2014
    Date of Patent: July 18, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD
    Inventors: Shih-Jhang Tian, Pei-Yi Su, Yi-Ming Dai
  • Publication number: 20170123328
    Abstract: A photolithography tool includes at least one process chamber, at least one front opening unified pod (FOUP) stage, at least one moving mechanism, and an image sensor. The moving mechanism is configured to move the wafer from the process chamber to the FOUP stage. The image sensor is configured to capture the image of the wafer on the moving mechanism.
    Type: Application
    Filed: October 30, 2015
    Publication date: May 4, 2017
    Inventors: Chia-Feng LIAO, Chun-Hsien LIN, Pei-Yi SU, Yi-Ming DAI, Chung-Hsing LEE, Chien-Ko LIAO, Chun-Yung CHANG, Nan-Jung CHEN, Pei-Yuan WU, Hsien-Mao HUANG
  • Publication number: 20160184839
    Abstract: A method of providing a liquid over a substrate is provided. The method includes providing the liquid over the substrate via a first opening of a flow path formed in a spray nozzle. The method further includes sucking back the liquid away from the first opening of the flow path. The method also includes holding the chemical solution in the flow path to keep a front surface of the chemical solution located in a tapered flow path section of the flow path.
    Type: Application
    Filed: December 30, 2014
    Publication date: June 30, 2016
    Inventors: Shih-Jhang TIAN, Pei-Yi SU, Yi-Ming DAI
  • Patent number: 8129762
    Abstract: A method is provided for processing a substrate. The substrate has at least one filter region, a plurality of bond pads, and a plurality of scribe lines arranged around the filter region and bond pads. A first planarization layer is formed above the substrate. The planarization layer has a substantially flat top surface overlying the filter region, the bond pads and the scribe lines. At least one color resist layer is formed over the first planarization layer and within the filter region while the first planarization layer covers the bond pads and the scribe lines.
    Type: Grant
    Filed: December 31, 2008
    Date of Patent: March 6, 2012
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Fu-Tien Weng, Yu-Kung Hsiao, Hung-Jen Hsu, Yi-Ming Dai, Chin Chen Kuo, Te-Fu Tseng, Chih-Kung Chang, Jack Deng, Chung-Sheng Hsiung, Bii-Junq Chang