Abstract: An adaptive frame rate modulation system and method thereof are described. A frame processing unit is employed to receive a first frame and a second frame for dividing the second frame into a plurality of second block frames. A frame change detection unit compares the first block frames with the second block frames correspondingly for detecting the change status between the first and second frames. A timing generator classifies the second block frames of the second frame to construct a plurality of frame rates based on the compared results of the first and second block frames. The timing generator further modulates the frame rates of the second frames.

Abstract: A start protection circuit of a gate driver, which is applied in a liquid crystal display, includes a detection circuit and a switch. The detection circuit monitors a gate low voltage to generate a control signal. The switch is electrically connected to the detection circuit and controlled by the control signal, for transmitting a gate high voltage. The detection circuit outputs the gate low voltage first and monitors if the gate low voltage has reached a predetermined level. When the gate low voltage has reached the predetermined level, the detection circuit turns on the switch to output the gate high voltage.

Abstract: An LCD for reducing motion blur includes a display panel, a source driver, a gate driver, and a timing controller. The display panel includes a plurality of pixels for display an image data. The timing controller includes a timing control unit and a data processing unit. The timing control unit controls the timing of the image data outputting to the source driver and the gate driver. The data processing unit analyzes the image data so as to insert black gray-level for the different pixels of the plurality of pixels in the different frames.

Abstract: A circuit layout of a circuit substrate having a plurality of device bonding areas is provided. The circuit layout includes first pads, second pads, bridging lines, first outer leads and second outer leads. Each device bounding area is configured with one first pad and one second pad. The bridging lines are respectively disposed between any two adjacent device bounding areas and extended from a side of the first pad inside one device bounding area to a side of the second pad inside another one device bounding area adjacent to the first pad. Each first outer lead and each second outer lead are respectively corresponding to one first pad and one second pad, are respectively correspondingly extended into the device bounding area which the first pad and the second pad are located at, and are beside the first pad and the second pad correspondingly.

Abstract: A common voltage compensation device suitable for a display panel of a liquid crystal display is provided. The common voltage compensation device includes a timing controller and a compensation circuit. The timing controller receives an image signal and generates control signals to the compensation circuit according to a determination mechanism. The compensation circuit sends a common voltage compensation signal to the display panel according to the control signals outputted from the timing controller in order to compensate the common voltage on the display panel. The determination mechanism performs an analysis of a gray scale distribution of a horizontal line signal of the image signal, and determines whether to compensate the common voltage according to an analysis result, and determines a polarity required to be compensated to perform the compensation when the compensation is needed.

Abstract: The present invention provides a shift register having simple circuit scheme capable of increasing lifetime of whole circuit and a related Liquid Crystal Display (LCD). The shift register includes a plurality of shift register units connected in cascade, wherein at least one of the plurality of shift register units includes: an output terminal, a first switch element, a second switch element, a third switch element, a fourth switch element, a fifth switch element, and a sixth switch element. In addition, The LCD includes a plurality of gate output signal lines and the shift register mentioned above. The plurality of shift register units connected in cascade are coupled to the plurality of gate output signal lines, respectively.

Abstract: A field sequential display method with overlapped multi-scan driving applied in a Field Sequential Display and device thereof includes turning on LEDs of one color in each of a plurality of blocks of a backlight module sequentially, and writing the image data of the color into pixels of the block when the LEDs of the color of the block are turned on; writing a voltage of a black frame into the pixels of the block after the image data of the color is written into the pixels of the block; and turning off the LEDs of one color of the block after the voltage of the black frame is written into the pixels of the block. By doing so, the response time of a crystal of a pixel can be increased, and uneven color distribution in the upper and lower portions of the frame can be reduced.

Abstract: A method for driving a liquid crystal display (LCD) apparatus, wherein the LCD apparatus comprises a plurality of scan rows, a plurality of data columns, and a data driving circuit, includes: driving a plurality of specific scan rows of the plurality of scan rows at a same time; extracting a plurality of pixel data, arranged into a first order, corresponding to the plurality of specific scan rows; arranging the plurality of pixel data into a second order different from the first order according to a connecting relationship between the data driving circuit and a plurality of pixels of the plurality of specific scan rows; and utilizing the data driving circuit to drive a plurality of pixels according to the plurality of pixel data corresponding to the second order.

Abstract: The present invention includes a resistive module, the resistive module including a plurality of nodes and at least a resistive component. The plurality of nodes include an input terminal and an output terminal of the resistive module; the resistive component is electronically connected between the input terminal and the output terminal of the resistive module to thereby make the input terminal and the output terminal have a specified resistive value therebetween. In addition, the resistive component is electrically connected between two nodes of a node pair among the nodes, and each resistive component has a corresponding predetermined resistive value.

Abstract: A method for driving a color-sequential display suitable to reduce the color break-up phenomenon of the color-sequential display is disclosed. The method includes: dividing each sub-frame period into a data-writing period and a backlight turned-on period; within the data-writing period, transmitting a data of first color; during a first duration of the backlight turned-on period, turning on a first color backlight; during a second duration of the backlight turned-on period, turning on a second color backlight.

Abstract: The present invention provides a shift register having simple circuit scheme capable of increasing lifetime of whole circuit and a related Liquid Crystal Display (LCD). The shift register includes a plurality of shift register units connected in cascade, wherein at least one of the plurality of shift register units includes: an output terminal, a first switch element, a second switch element, a third switch element, a fourth switch element, a fifth switch element, and a sixth switch element. In addition, The LCD includes a plurality of gate output signal lines and the shift register mentioned above. The plurality of shift register units connected in cascade are coupled to the plurality of gate output signal lines, respectively.

Abstract: A display device and a driving device for driving a backlight module are provided. The driving device includes a power conversion circuit (PCC), a PWM generator, a current control unit (CCU) and a voltage feedback compensation circuit (VFCC). The PCC is used for converting an input voltage into an adjustable voltage supplied to the backlight module. The CCU is used for controlling current flowing through the backlight module. The VFCC is used for receiving an output voltage from the backlight module and providing a feedback voltage to the PWM generator, so that the PWM generator adjusts the adjustable voltage accordingly. Therefore, the driving device submitted by the present invention can be reduced the entire power consumption of the display device and further avoided the current control unit happened damage also.

Abstract: A light source driving circuit including a driving module, a plurality of first switches, a detecting unit, and a control unit is provided. The plurality of first switches is respectively coupled to corresponding light sources and these light sources are driven by the driving module. The detecting unit is coupled to the driving module to detect a working parameter of each light source and transmit the working parameter to the control unit. When the detecting unit detects some of these light sources are broken down, the control unit sequentially turns on the first switches to find out the failed light source. Moreover, the first switch coupled to the failed light source is remained on, and the driving signal is regulated according to the number of the failed light source, such that the brightness of the panel does not decrease.

Abstract: An active device array substrate including a substrate, a pixel array, a plurality of first pads and a plurality of second pads is provided. The substrate has a display area and a peripheral area. Additionally, the pixel array is disposed within the display area. The first pads and the second pads are disposed within the peripheral area, and electrically connected to the pixel array respectively. Moreover, the first pads have a plurality of micro cavities.

Abstract: A pixel dithering driving method and a timing controller using the same are provided. The method uses the N low order bits of M bits together with at least one virtual bit to build several pixel dithering patterns. After the timing controller uses M bits of data received by the timing controller to look up a specific high order bit value, a specific low order bit value, and a specific pixel dithering value corresponding to the M bits in a predetermined gray level look up table and decides the output gray levels according to the specific high order bit value, the timing controller can further select a specific pixel dithering pattern from the pixel dithering patterns mentioned above according to the specific low order bit value and the specific pixel dithering value.

Abstract: A display method with interlacing reversal scan and a device thereof are provided. The scan mode is interlacing reversal scan. Thus, in time and space, each color frame with poor luminance response can be alternately distributed on up-side and the down-side region of the frame instead on low-side region of the frame. Then, during the period of continuous frame displaying, the present invention may balance color distribution between the up-side and the down-side region, and effectively reduce the flicker phenomenon of the frame.

Abstract: An adaptive Gamma voltage switching method and a device using the same is presented. An equalization unit utilizes a video data to obtain an equalized luminance data. An adaptive Gamma voltage switching core dynamically adjusts a Gamma voltage and outputs the adjusted Gamma voltage to a panel according to the equalized luminance data so as to enable the panel to alternately display a black insertion frame and a dynamic frame with adaptive contrast. The present invention not only enhances frame contrast but also reduces frame blur, and furthermore improves the insufficient luminance caused by black insertion.

Abstract: A common voltage compensation device suitable for a display panel of a liquid crystal display is provided. The common voltage compensation device includes a timing controller and a compensation circuit. The timing controller receives an image signal and generates control signals to the compensation circuit according to a determination mechanism. The compensation circuit sends a common voltage compensation signal to the display panel according to the control signals outputted from the timing controller in order to compensate the common voltage on the display panel. The determination mechanism performs an analysis of a gray scale distribution of a horizontal line signal of the image signal, and determines whether to compensate the common voltage according to an analysis result, and determines a polarity required to be compensated to perform the compensation when the compensation is needed.

Abstract: A dynamic Gamma correction circuit, method thereof and a panel display apparatus are provided. The panel display apparatus has a timing controller, a dynamic Gamma correction circuit, a display panel and a display driving circuit. The timing controller receives a first image data and output a second image data. The dynamic Gamma correction circuit receives and analyzes the first image data so as to correct and output a plurality of Gamma voltages. The display driving circuit electrically connects to the display panel, the timing controller and the dynamic Gamma correction circuit for receiving the second image data and the Gamma voltage so as to drive the display panel.