Patents by Inventor Yi-Pin Chen

Yi-Pin Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9859320
    Abstract: A chip package includes a chip, an insulating layer and a conductive layer. The chip includes a substrate, an epitaxy layer, a device region and a conductive pad. The epitaxy layer is disposed on the substrate, and the device region and the conductive pad are disposed on the epitaxy layer. The conductive pad is at a side of the device region and connected to the device region. The conductive pad protrudes out of a side surface of the epitaxy layer. The insulating layer is disposed below the substrate and extended to cover the side surface of the epitaxy layer. The conductive layer is disposed below the insulating layer and extended to contact the conductive pad. The conductive layer and the side surface of the epitaxy layer are separated by a first distance.
    Type: Grant
    Filed: December 28, 2016
    Date of Patent: January 2, 2018
    Assignee: XINTEC INC.
    Inventors: Shun-Wen Long, Guo-Jyun Chiou, Meng-Han Kuo, Ming-Chieh Huang, Hsi-Chien Lin, Chin-Kang Chen, Yi-Pin Chen
  • Publication number: 20170186797
    Abstract: A chip package includes a chip, an insulating layer and a conductive layer. The chip includes a substrate, an epitaxy layer, a device region and a conductive pad. The epitaxy layer is disposed on the substrate, and the device region and the conductive pad are disposed on the epitaxy layer. The conductive pad is at a side of the device region and connected to the device region. The conductive pad protrudes out of a side surface of the epitaxy layer. The insulating layer is disposed below the substrate and extended to cover the side surface of the epitaxy layer. The conductive layer is disposed below the insulating layer and extended to contact the conductive pad. The conductive layer and the side surface of the epitaxy layer are separated by a first distance.
    Type: Application
    Filed: December 28, 2016
    Publication date: June 29, 2017
    Inventors: Shun-Wen LONG, Guo-Jyun CHIOU, Meng-Han KUO, Ming-Chieh HUANG, Hsi-Chien LIN, Chin-Kang CHEN, Yi-Pin CHEN
  • Patent number: 8988051
    Abstract: A synchronous rectifying buck-boost converter includes a controller, first and second transistors, an inductor and a capacitor. The controller is connected to the gates of the first and second transistors for controlling ON/OFF of the first and second transistors, and further controls the current of the inductor and charge/discharge of the capacitor. The first and second transistors connected in series are connected to the controller and the inductor. The inductor is connected to a first external power unit or a first external loading device. The drain of the first transistor is connected to a second external power unit or a second external loading device such that a low-voltage input power of the first external power unit is converted to a high-voltage output power or a high-voltage input power of the second external power unit is converted to a low-voltage output power.
    Type: Grant
    Filed: October 1, 2013
    Date of Patent: March 24, 2015
    Assignee: Inno-Tech Co., Ltd.
    Inventors: Ching-Yuan Lin, Shu-Chia Lin, Wen-Yueh Hsieh, Yi-Pin Chen
  • Patent number: 8907736
    Abstract: A digital pulse width modulation controller includes a pulse width modulation controller, a selection unit having at least one selector, a comparison unit having at least one comparator, and a signal conversion unit having at least one digital-to-analog converter. The digital-to-analog converter generates a reference current and/or voltage. The comparator receives the reference current and/or voltage, and performs a comparison operation to generate a comparison signal based on a feedback signal. The selector selects one selection signal to input into the pulse width modulation controller, which receives other parameters set by a user or the system at the same time so as to control characteristics of the digital pulse width modulation signals, thereby improving the electric properties of a loading circuit.
    Type: Grant
    Filed: September 10, 2013
    Date of Patent: December 9, 2014
    Assignee: Inno-Tech Co., Ltd.
    Inventors: Chih Feng Lin, Shu-Chia Lin, Wen-Yueh Hsieh, Ching-Yuan Lin, Ting-Chin Tsen, Yi-Pin Chen
  • Publication number: 20140218125
    Abstract: A digital pulse width modulation controller includes a pulse width modulation controller, a selection unit having at least one selector, a comparison unit having at least one comparator, and a signal conversion unit having at least one digital-to-analog converter. The digital-to-analog converter generates a reference current and/or voltage. The comparator receives the reference current and/or voltage, and performs a comparison operation to generate a comparison signal based on a feedback signal. The selector selects one selection signal to input into the pulse width modulation controller, which receives other parameters set by a user or the system at the same time so as to control characteristics of the digital pulse width modulation signals, thereby improving the electric properties of a loading circuit.
    Type: Application
    Filed: September 10, 2013
    Publication date: August 7, 2014
    Applicant: INNO-TECH CO., LTD.
    Inventors: Chih Feng Lin, Shu-Chia Lin, Wen-Yueh Hsieh, Ching-Yuan Lin, Ting-Chin Tsen, Yi-Pin Chen
  • Publication number: 20140092641
    Abstract: A synchronous rectifying buck-boost converter includes a controller, first and second transistors, an inductor and a capacitor. The controller is connected to the gates of the first and second transistors for controlling ON/OFF of the first and second transistors, and further controls the current of the inductor and charge/discharge of the capacitor. The first and second transistors connected in series are connected to the controller and the inductor. The inductor is connected to a first external power unit or a first external loading device. The drain of the first transistor is connected to a second external power unit or a second external loading device such that a low-voltage input power of the first external power unit is converted to a high-voltage output power or a high-voltage input power of the second external power unit is converted to a low-voltage output power.
    Type: Application
    Filed: October 1, 2013
    Publication date: April 3, 2014
    Applicant: INNO-TECH CO., LTD.
    Inventors: Ching-Yuan Lin, Shu-Chia Lin, Wen-Yueh Hsieh, Yi-Pin Chen