Patents by Inventor Yi-Ping Kao

Yi-Ping Kao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Portable device and calibration method thereof
    Patent number: 10114437
    Abstract: A portable device is provided. A first processor performs an initial procedure according to an operation clock with a first frequency value and an operation voltage with a first voltage value, and performs a calibration procedure according to the operation clock with a second frequency value and the operation voltage with a second voltage value when the initial procedure has been performed and a self-calibration event is present. A second processor detects whether a specific function of the calibration procedure is being performed by the first processor. The second processor stores the second frequency value and the second voltage value into a storage unit after the calibration procedure is performed. The second voltage value is lower than the first voltage value, and the second frequency value is lower than the first frequency value.
    Type: Grant
    Filed: July 28, 2016
    Date of Patent: October 30, 2018
    Assignee: MEDIATEK INC.
    Inventors: Yi-Chang Zhuang, Lee-Kee Yong, Wu-an Kuo, Yi-Ping Kao, Alice Wang, Uming Ko
  • Integrated circuit and electronic device
    Patent number: 10048742
    Abstract: The present invention provides an integrated circuit. The integrated circuit comprises: a plurality of core power sources; and a plurality of core power domains, coupled to the core power sources, respectively; wherein the core power domains are overlapped with each other.
    Type: Grant
    Filed: November 27, 2014
    Date of Patent: August 14, 2018
    Assignee: MEDIATEK INC.
    Inventors: Chih-Ching Lin, Yi-Ping Kao, Chun-Sung Su
  • PORTABLE DEVICE AND CALIBRATION METHOD THEREOF
    Publication number: 20170031405
    Abstract: A portable device is provided. A first processor performs an initial procedure according to an operation clock with a first frequency value and an operation voltage with a first voltage value, and performs a calibration procedure according to the operation clock with a second frequency value and the operation voltage with a second voltage value when the initial procedure has been performed and a self-calibration event is present. A second processor detects whether a specific function of the calibration procedure is being performed by the first processor. The second processor stores the second frequency value and the second voltage value into a storage unit after the calibration procedure is performed. The second voltage value is lower than the first voltage value, and the second frequency value is lower than the first frequency value.
    Type: Application
    Filed: July 28, 2016
    Publication date: February 2, 2017
    Inventors: Yi-Chang ZHUANG, Lee-Kee YONG, Wu-an KUO, Yi-Ping KAO, Alice WANG, Uming KO
  • INTERGRATED CIRCUIT
    Publication number: 20150200565
    Abstract: The present invention provides an intergrated circuit. The intergrated circuit comprises: a plurality of core power sources; and a plurality of core power domains, coupled to the core power sources, respectively; wherein the core power domains are overlapped with each other.
    Type: Application
    Filed: November 27, 2014
    Publication date: July 16, 2015
    Inventors: Chih-Ching Lin, Yi-Ping Kao, Chun-Sung Su