Patents by Inventor Yi Qi

Yi Qi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240122558
    Abstract: A PET scanner includes gamma-ray detector rings that form a bore through which an imaging subject is translated, a length of the bore defining an axial length of the PET scanner, the gamma-ray detector rings being movable along the axial length, the gamma-ray detector rings including gamma-ray detector modules therein, and processing circuitry configured to receive PET data associated with a plurality of transaxial slices of the imaging subject, the PET data including a first set of spatial information and timing information corresponding to a first data acquisition period for the gamma-ray detector modules in a first axial position and a second set of spatial information and timing information corresponding to a second data acquisition period for the gamma-ray detector modules in a second axial position, and reconstruct a PET image based on the first set of spatial and timing information and the second set of spatial and timing information.
    Type: Application
    Filed: October 11, 2022
    Publication date: April 18, 2024
    Applicant: CANON MEDICAL SYSTEMS CORPORATION
    Inventors: Wenyuan QI, Kent C. BURR, Yi QIANG, Evren ASMA, Jeffrey KOLTHAMMER
  • Publication number: 20240116707
    Abstract: A powered industrial truck includes a lateral movement assembly including four sliding members and four pivotal members both on a wheeled carriage, four links having a first end pivotably secured to the sliding member and a second end pivotably secured to either end of the pivotal member, a motor shaft having two ends pivotably secured to the pivotal members respectively, a first electric motor on one frame member, and four mounts attached to the sliding members respectively; two lift assemblies including a second electric motor, a shaft having two ends rotatably secured to the sliding members respectively, two gear trains at the ends of the shaft respectively, a first gear connected to the second electric motor, a second gear on the shaft, and a first roller chain on the first and second gears; two electric attachments on the platform and being laterally moveable, each attachment. The mount has rollers.
    Type: Application
    Filed: September 21, 2023
    Publication date: April 11, 2024
    Inventors: Jung-Chieh Chang, Yi-Sheng Chen, Jen-Yung Hsiao, Chia-Fu Hsiao, Wei-Qi Lao, Chen-Chih Chan, Chung-Yu Liu
  • Publication number: 20240113140
    Abstract: A ridge recognition substrate and a ridge recognition apparatus. The ridge recognition substrate includes: a base substrate including a photosensitive area, and a light-shielding area located on at least one side of the photosensitive area; a plurality of photosensitive devices, arranged in the photosensitive area in an array; each photosensitive device includes a first electrode, a photoelectric conversion structure and a second electrode arranged in layers, the photoelectric conversion structure is electrically connected with the first electrode, and the photoelectric conversion structure directly contacts with the second electrode; and dummy devices, arranged in the light-shielding area in an array, each dummy device including a third electrode, an equivalent dielectric layer and a fourth electrode, the third electrode and the first electrode is in the same layer, the fourth electrode is located at the side of the layer where the second electrode is located facing away from the base substrate.
    Type: Application
    Filed: May 26, 2021
    Publication date: April 4, 2024
    Inventors: Yajie FENG, Cheng LI, Yue GENG, Kuiyuan WANG, Zhonghuan LI, Yi DAI, Chaoyang QI, Zefei LI, Congcong XI, Xiaoguan LI
  • Patent number: 11947835
    Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for controlling, by an on-chip memory controller, a plurality of hardware components that are configured to perform computations to access a shared memory. One of the on-chip memory controller includes at least one backside arbitration controller communicatively coupled with a memory bank group and a first hardware component, wherein the at least one backside arbitration controller is configured to perform bus arbitrations to determine whether the first hardware component can access the memory bank group using a first memory access protocol; and a frontside arbitration controller communicatively coupled with the memory bank group and a second hardware component, wherein the frontside arbitration controller is configured to perform bus arbitrations to determine whether the second hardware component can access the memory bank group using a second memory access protocol different from the first memory access protocol.
    Type: Grant
    Filed: September 21, 2021
    Date of Patent: April 2, 2024
    Assignee: Black Sesame Technologies Inc.
    Inventors: Zheng Qi, Yi Wang, Yanfeng Wang
  • Publication number: 20240088071
    Abstract: Methods for reducing resistivity of metal gapfill include depositing a conformal layer in an opening of a feature and on a field of a substrate with a first thickness of the conformal layer of approximately 10 microns or less, depositing a non-conformal metal layer directly on the conformal layer at a bottom of the opening and directly on the field using an anisotropic deposition process. A second thickness of the non-conformal metal layer on the field and on the bottom of the feature is approximately 30 microns or greater. And depositing a metal gapfill material in the opening of the feature and on the field where the metal gapfill material completely fills the opening without any voids.
    Type: Application
    Filed: September 14, 2022
    Publication date: March 14, 2024
    Inventors: Yi XU, Yu LEI, Zhimin QI, Aixi ZHANG, Xianyuan ZHAO, Wei LEI, Xingyao GAO, Shirish A. PETHE, Tao HUANG, Xiang CHANG, Patrick Po-Chun LI, Geraldine VASQUEZ, Dien-yeh WU, Rongjun WANG
  • Publication number: 20240087955
    Abstract: A method and apparatus for forming tungsten features in semiconductor devices is provided. The method includes exposing a top opening of a feature formed in a substrate to a physical vapor deposition (PVD) process to deposit a tungsten liner layer within the feature. The PVD process is performed in a first processing region of a first processing chamber and the tungsten liner layer forms an overhang portion, which partially obstructs the top opening of the feature. The substrate is transferred from the first processing region of the first processing chamber to a second processing region of a second processing chamber without breaking vacuum. The overhang portion is exposed to nitrogen-containing radicals in the second processing region to inhibit subsequent growth of tungsten along the overhang portion. The feature is exposed to a tungsten-containing precursor gas to form a tungsten fill layer over the tungsten liner layer within the feature.
    Type: Application
    Filed: September 1, 2023
    Publication date: March 14, 2024
    Inventors: Yi XU, Xianyuan ZHAO, Zhimin QI, Aixi ZHANG, Geraldine VASQUEZ, Dien-Yeh WU, Wei LEI, Xingyao GAO, Shirish PETHE, Wenting HOU, Chao DU, Tsung-Han YANG, Kyoung-Ho BU, Chen-Han LIN, Jallepally RAVI, Yu LEI, Rongjun WANG, Xianmin TANG
  • Publication number: 20240075732
    Abstract: In a peeling system and a peeling method for a flexible fingerprint component provided by the present invention, the flexible fingerprint component is formed on a rigid substrate, and the flexible fingerprint component comprises a flexible substrate, a photosensitive device layer and an optical film sequentially arranged on the flexible substrate, a first chip-on film bonded to the photosensitive device layer on a first side of the optical film, and a second chip-on film bonded to the photosensitive device layer on a second side of the optical film, wherein the optical film is provided with an extension portion beyond the flexible substrate, the second side of the optical film is located on a side opposite to the extension portion, and the first side of the optical film is located on a side adjacent to the extension portion.
    Type: Application
    Filed: February 23, 2021
    Publication date: March 7, 2024
    Inventors: Yi DAI, Cheng LI, Yue GENG, Kuiyuan WANG, Chaoyang QI, Zefei LI, Yajie FENG, Xiaoguan LI, Zhonghuan LI
  • Publication number: 20240071127
    Abstract: An optical sensor array substrate and an optical fingerprint reader are provided. The optical sensor array substrate includes a substrate including a detection area which includes a plurality of photosensitive pixels. Photosensitive pixel includes: a TFT arranged on the substrate; a storage capacitor arranged on the substrate and having a first capacitor plate, and a second capacitor plate electrically connected to the source or drain of the TFT; a photosensitive element, having one end electrically connected to the second capacitor plate; a first electrode layer electrically connected to another end of the photosensitive element. On the substrate, an orthographic projection of the second capacitor plate at least partially overlaps with that of the first electrode layer, and the first capacitor plate is located in the same layer and has the same material as the gate of the TFT.
    Type: Application
    Filed: October 18, 2023
    Publication date: February 29, 2024
    Inventors: Yajie Feng, Cheng Li, Yue Geng, Kuiyuan Wang, Zefei Li, Chaoyang Qi, Yi Dai, Xiaoguan Li, Yingzi Wang
  • Patent number: 11291990
    Abstract: The invention discloses a quasi-volumetric sensing system and method. Plural short-range order (SRO) units are configured on the carrier of a quasi-volumetric device, and arranged as an array, i.e. a long-range order (LRO) unit. Protrusions, configured on the SRO units, can modify the wettability of the carrier to control the liquid volume retained thereon so that the precise volume of the liquid sample or droplets are calculated. Based on the applied force on the LRO unit and the gradient of hydrophilicity-hydrophobicity on the surface, the redundant volume of the liquid sample is removed. Macromolecules, e.g. antibodies, complements, receptor proteins, aptamers, oligosaccharides or oligonucleotides, configured on the protrusions are coupled to specific molecules in the liquid sample or droplets so as to determine characteristics of the specific molecules. Therefore, the open chip device of the invention can be used to achieve the quasi-volumetric measurement and the analysis of specific molecules.
    Type: Grant
    Filed: December 2, 2019
    Date of Patent: April 5, 2022
    Assignee: Tai-Saw Technology Co., Ltd.
    Inventors: Szu-Heng Liu, Yi-Qi Huang, Yu-Tung Huang
  • Patent number: 11172569
    Abstract: A strip for an electronic device senses a liquid sample. The strip includes a substrate having a first surface, a plurality of protrusions disposed on the first surface, and each having a width, and a hydrophilic layer having a layer surface disposed on the first surface and the plurality of protrusions, and having a second surface opposite to the layer surface, whereby the liquid sample and the second surface have a contact angle therebetween ranging from 2 to 85 degrees when the liquid sample is disposed on the hydrophilic layer.
    Type: Grant
    Filed: September 28, 2017
    Date of Patent: November 9, 2021
    Assignee: TAI-SAW Technology Co., Ltd.
    Inventors: Yu-Tung Huang, Ming-Hung Chang, Szu-Heng Liu, You-Jen Cho, Yi-Qi Huang, Chun Kuo
  • Publication number: 20210196166
    Abstract: A method for collecting a body fluid sample of a person to be examined is provided. The method comprises steps of: providing a body fluid sample collecting device and a body fluid sample inspection device for collecting the body fluid sample according to a test sampling requirement, wherein the body fluid sample collecting device includes a body fluid sample collecting region having an open hydrophilic layer with a specific layer area, and configured for collecting a predetermined amount of the body fluid sample; from a body surface of the person to be examined, causing the body fluid sample to be collected onto the body fluid sample collecting region until the body fluid sample covers the hydrophilic layer completely; and receiving the body fluid sample from the body fluid collecting region to be inspected in the body fluid sample inspection device.
    Type: Application
    Filed: August 11, 2020
    Publication date: July 1, 2021
    Applicant: TAI-SAW Technology Co., Ltd.
    Inventors: Wei-Yi Hsu, Pei-Tzu Hung, Yi-Qi Huang, Szu-Heng Liu, Yu-Tung Huang
  • Publication number: 20210197190
    Abstract: A planar volumetric device for quantifying and handling a body fluid sample is provided. The device has a planar main body, a body fluid sample flow path, an air pump and an air passage. The planar main body includes a first planar surface and a second planar surface. The body fluid sample flow path is disposed in the main body, and has a body fluid sample inlet, a middle junction and a body fluid sample outlet, wherein the middle junction and the body fluid sample outlet define therebetween a specific path segment, by which it is possible to externally observe to which extent the body fluid sample has filled up with the path segment. The air pump is configured to provide an operating air pressure. The air passage has a first end and a second end, wherein the first and the second ends are connected to the air pump and the middle junction respectively, and the specific path segment has a constant volume.
    Type: Application
    Filed: August 11, 2020
    Publication date: July 1, 2021
    Applicant: TAI-SAW Technology Co., Ltd.
    Inventors: Yi-Qi Huang, Wei-Yi Hsu, Pei-Tzu Hung, Szu-Heng Liu, Yu-Tung Huang
  • Patent number: 10957799
    Abstract: Embodiments of the present invention are directed to techniques for providing an novel field effect transistor (FET) architecture that includes a center fin region and one or more vertically stacked nanosheets. In a non-limiting embodiment of the invention, a nanosheet stack is formed over a substrate. The nanosheet stack can include one or more first semiconductor layers and one or more first sacrificial layers. A trench is formed by removing a portion of the one or more first semiconductor layers and the one or more first sacrificial layers. The trench exposes a surface of a bottommost sacrificial layer of the one or more first sacrificial layers. The trench can be filled with one or more second semiconductor layers and one or more second sacrificial layers such that each of the one or more second semiconductor layers is in contact with a sidewall of one of the one or more first semiconductor layers.
    Type: Grant
    Filed: February 27, 2019
    Date of Patent: March 23, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Ruilong Xie, Julien Frougier, Chanro Park, Edward Nowak, Yi Qi, Kangguo Cheng, Nicolas Loubet
  • Patent number: 10903369
    Abstract: Embodiments of the present invention are directed to techniques for providing an novel field effect transistor (FET) architecture that includes a center fin region and one or more vertically stacked nanosheets. In a non-limiting embodiment of the invention, a non-planar channel region is formed having a first semiconductor layer, a second semiconductor layer, and a fin-shaped bridge layer between the first semiconductor layer and the second semiconductor layer. Forming the non-planar channel region can include forming a nanosheet stack over a substrate, forming a trench by removing a portion of the nanosheet stack, and forming a third semiconductor layer in the trench. Outer surfaces of the first semiconductor layer, the second semiconductor layer, and the fin-shaped bridge region define an effective channel width of the non-planar channel region.
    Type: Grant
    Filed: February 27, 2019
    Date of Patent: January 26, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Ruilong Xie, Julien Frougier, Chanro Park, Edward Nowak, Yi Qi, Kangguo Cheng, Nicolas Loubet
  • Patent number: 10884793
    Abstract: A method and apparatus for parallelization of data processing. The method including: parsing a data processing flow to split a write table sequence for the data processing flow; generating a plurality of instances of the data processing flow based at least in part on the split write table sequence; and scheduling the plurality of instances for parallelization of data processing.
    Type: Grant
    Filed: April 25, 2017
    Date of Patent: January 5, 2021
    Assignee: International Business Machines Corporation
    Inventors: Ning Duan, Wei Huang, Peng Ji, Yi Qi, Qi Zhang, Jun Zhu
  • Publication number: 20200274000
    Abstract: Embodiments of the present invention are directed to techniques for providing an novel field effect transistor (FET) architecture that includes a center fin region and one or more vertically stacked nanosheets. In a non-limiting embodiment of the invention, a non-planar channel region is formed having a first semiconductor layer, a second semiconductor layer, and a fin-shaped bridge layer between the first semiconductor layer and the second semiconductor layer. Forming the non-planar channel region can include forming a nanosheet stack over a substrate, forming a trench by removing a portion of the nanosheet stack, and forming a third semiconductor layer in the trench. Outer surfaces of the first semiconductor layer, the second semiconductor layer, and the fin-shaped bridge region define an effective channel width of the non-planar channel region.
    Type: Application
    Filed: February 27, 2019
    Publication date: August 27, 2020
    Inventors: RUILONG XIE, Julien Frougier, CHANRO PARK, Edward Nowak, Yi Qi, Kangguo Cheng, NICOLAS LOUBET
  • Publication number: 20200273979
    Abstract: Embodiments of the present invention are directed to techniques for providing an novel field effect transistor (FET) architecture that includes a center fin region and one or more vertically stacked nanosheets. In a non-limiting embodiment of the invention, a nanosheet stack is formed over a substrate. The nanosheet stack can include one or more first semiconductor layers and one or more first sacrificial layers. A trench is formed by removing a portion of the one or more first semiconductor layers and the one or more first sacrificial layers. The trench exposes a surface of a bottommost sacrificial layer of the one or more first sacrificial layers. The trench can be filled with one or more second semiconductor layers and one or more second sacrificial layers such that each of the one or more second semiconductor layers is in contact with a sidewall of one of the one or more first semiconductor layers.
    Type: Application
    Filed: February 27, 2019
    Publication date: August 27, 2020
    Inventors: RUILONG XIE, Julien Frougier, CHANRO PARK, Edward Nowak, Yi Qi, Kangguo Cheng, NICOLAS LOUBET
  • Patent number: 10756184
    Abstract: The present disclosure relates to semiconductor structures and, more particularly, to faceted epitaxial source/drain regions and methods of manufacture. The structure includes: a gate structure over a substrate; an L-shaped sidewall spacer located on sidewalls of the gate structure and extending over the substrate adjacent to the gate structure; and faceted diffusion regions on the substrate, adjacent to the L-shaped sidewall spacer.
    Type: Grant
    Filed: November 5, 2018
    Date of Patent: August 25, 2020
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: George R. Mulfinger, Timothy J. McArdle, Judson R. Holt, Steffen A. Sichler, Ömür I. Aydin, Wei Hong, Yi Qi, Hui Zang, Liu Jiang
  • Publication number: 20200206731
    Abstract: The invention discloses a quasi-volumetric sensing system and method. Plural short-range order (SRO) units are configured on the carrier of a quasi-volumetric device, and arranged as an array, i.e. a long-range order (LRO) unit. Protrusions, configured on the SRO units, can modify the wettability of the carrier to control the liquid volume retained thereon so that the precise volume of the liquid sample or droplets are calculated. Based on the applied force on the LRO unit and the gradient of hydrophilicity-hydrophobicity on the surface, the redundant volume of the liquid sample is removed. Macromolecules, e.g. antibodies, complements, receptor proteins, aptamers, oligosaccharides or oligonucleotides, configured on the protrusions are coupled to specific molecules in the liquid sample or droplets so as to determine characteristics of the specific molecules. Therefore, the open chip device of the invention can be used to achieve the quasi-volumetric measurement and the analysis of specific molecules.
    Type: Application
    Filed: December 2, 2019
    Publication date: July 2, 2020
    Inventors: Szu-Heng Liu, Yi-Qi Huang, Yu-Tung Huang
  • Patent number: 10700173
    Abstract: One illustrative FinFET device disclosed herein includes a source/drain structure that, when viewed in a cross-section taken through the fin in a direction corresponding to the gate width (GW) direction of the device, comprises a perimeter and a bottom surface. The source/drain structure also has an axial length that extends in a direction corresponding to the gate length (GL) direction of the device. The device also includes a metal silicide material positioned on at least a portion of the perimeter of the source/drain structure for at least a portion of the axial length of the source/drain structure and on at least a portion of the bottom surface of the source/drain structure for at least a portion of the axial length of the source/drain structure.
    Type: Grant
    Filed: April 10, 2018
    Date of Patent: June 30, 2020
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Yi Qi, Hsien-Ching Lo, Hong Yu, Yanping Shen, Wei Hong, Xing Zhang, Ruilong Xie, Haiting Wang, Hui Zhan, Yong Jun Shi