Abstract: Disclosed are a computer-implemented method, a system and a computer program product for feature processing. In the computer-implemented method for feature processing, two input features selected from multiple features of each sample in a sample set are projected to one resulting feature by one or more processing units based on a specified curve. The sample set is updated by replacing the two input features with the one resulting feature for each sample in the sample set by one or more processing units. The projecting and the updating for the sample set are repeated by one or more processing units until the number of features of each sample in the sample set reaches a predetermined criterion.

Abstract: A method of forming a semiconductor device includes forming a sacrificial gate structure over a substrate, depositing a spacer layer on the sacrificial gate structure in a conformal manner, performing a multi-step oxidation process to the spacer layer, etching the spacer layer to form gate sidewall spacers on opposite sidewalls of the sacrificial gate structure, removing the sacrificial gate structure to form a trench between the gate sidewalls spacers, and forming a metal gate structure in the trench.

Abstract: Embodiments include nanostructure devices and methods of forming nanostructure devices which include a treatment process to expand a sidewall spacer material to close a seam in the sidewall spacer material after deposition. The treatment process includes oxidation anneal and heat anneal to expand the sidewall spacer material and crosslink the open seam to form a closed seam, lower k-value, and decrease density.

Abstract: The present invention provides an omniphobic membrane and application thereof. The omniphobic membrane comprises a porous substrate which has a pore size between 0.4 and 2 ?m, a top coat, and an interface layer between the porous substrate and the top coat, and the omniphobic membrane has a carbon/silicon ratio between 40 and 60, and a hierarchical re-entrant structure. Furthermore, both of a process for fabricating the omniphobic membrane and a method for desalination of a liquid by membrane distillation are provided in the present invention.

Abstract: The present invention provides an omniphobic membrane and application thereof. The omniphobic membrane comprises a porous substrate which has a pore size between 0.4 and 2 ?m, a top coat, and an interface layer between the porous substrate and the top coat, and the omniphobic membrane has a carbon/silicon ratio between 40 and 60, and a hierarchical re-entrant structure. Furthermore, both of a process for fabricating the omniphobic membrane and a method for desalination of a liquid by membrane distillation are provided in the present invention.

Abstract: An electronic apparatus with rotation function includes a loading side, a stationary portion and a rotation portion. The stationary portion is disposed at the loading side. The rotation portion is configured for connecting with a functional apparatus. The rotation portion is connected with the stationary portion in an unfixed way. The functional apparatus rotates relative to the stationary portion by the rotation portion.

Abstract: A voltage regulating circuit converts a first voltage and provides the converted first voltage to a first voltage pin of a north bridge chip after receiving a control signal from a south bridge chip. A second voltage pin of the north bridge chip is connected to a voltage converting circuit for receiving a second voltage. The logic control circuit receives a control signal from the super I/O chip and outputs a first control signal to turn on the switch to connect the first and the second voltage pins together. The logic control circuit also outputs a second control signal to the voltage regulating circuit to control the voltage regulating circuit to stop providing the converted first voltage to the first voltage pin of the north bridge chip. The voltage converting circuit provides the second voltage to the first voltage pin of the north bridge chip via the switch.

Abstract: The portable computer includes a PCIe controller, a DisplayPort connector, and a combination switch. The DisplayPort connector includes a hot plug pin. The combination switch is connected between the PCIe controller and the DisplayPort connector. The combination switch includes a selecting pin electronically connected to the hot plug pin. When the DisplayPort connector is electronically coupled to a discrete graphics card using PCIe, the hot plug pin sends a hot plug voltage signal to the selecting pin, and the combination switch electronically connects the DisplayPort connector to the PCIe controller after receiving the signal.

Abstract: A printed circuit board includes a mounting area. The mounting area includes a first mounting portion and a second mounting portion. The first and second mounting portions partially overlap. The first mounting portion includes a number of first holes, a number of second holes, and a third hole. The first holes, the second holes, and the third hole are configured for the mounting of signal pins of a universal serial bus (USB) pin. The second mounting portion includes the first holes and a number of fixing holes. The first holes are configured for the mounting of signal pins of a USB connector. The fixing holes are configured for the mounting of fixing pins of the USB connector.

Abstract: A computer motherboard includes a display controller, a digital visual interface integrated (DVI-I) connector, and a switching unit. The switching unit includes four first terminals, two second terminals, and a control terminal. Two of the first terminals are respectively connected to clock and data pins of a first display data channel (DDC) of the display controller, the other two first terminals are respectively connected to clock and data pins of a second DDC of the display controller, and the second terminals are respectively connected to DDC clock and DDC data pins of the DVI-I connector. The control terminal is connected to a hot plug detect pin of the DVI-I connector to detect a voltage and correspondingly control the second terminals to be respectively connected to the two first terminals connected to the clock and data pins of the first DDC or the second DDC.

Abstract: A power supply converting circuit includes a multi-phase pulse-width modulation (PWM) controller, a single-phase PWM controller, some first voltage converting circuits, a second voltage converting circuit, and an electrical switch unit. The multi-phase PWM controller provides some first PWM signals and a second PWM signal. The single-phase PWM controller provides a third PWM signal. The first voltage converting circuits receive the first PWM signals to output a first power supply to a central processing unit (CPU) chipset. The electrical switch unit receives the second and third PWM signals to selectively output the second or third PWM signal to the second voltage converting circuit to output one of the first and second power supplies, such that the second voltage converting circuit selectively outputs one of the first and second power supplies to the CPU chipset.

Abstract: A power control circuit for a hard disk drive (HDD) includes a first control circuit, a second control circuit, a first connector connected to a power supply, the first and second control circuits, and a second connector connected to the first control circuit and the HDD. The power supply outputs a first voltage signal and a second voltage signal to the first and second control circuits via the first connector. The first control circuit converts the first and second voltage signals into a form compatible with a timing sequence of the HDD receiving voltage signals, and outputs the first and second voltage signals to the HDD via the second connector. The second control circuit controls the first control circuit.

Abstract: A printed circuit board includes a mounting area. The mounting area includes a first mounting portion and a second mounting portion. The first and second mounting portions partially overlap. The first mounting portion includes a number of first holes, a number of second holes, and a third hole. The first holes, the second holes, and the third hole are configured for the mounting of signal pins of a universal serial bus (USB) pin. The second mounting portion includes the first holes and a number of fixing holes. The first holes are configured for the mounting of signal pins of a USB connector. The fixing holes are configured for the mounting of fixing pins of the USB connector.

Abstract: A power supply converting circuit includes a multi-phase pulse-width modulation (PWM) controller, a single-phase PWM controller, some first voltage converting circuits, a second voltage converting circuit, first and second electrical switch units. The multi-phase PWM controller provides some first PWM signals and a second PWM signal. The single-phase PWM controller provides a third PWM signal. The first voltage converting circuits receive the first PWM signals to output a first power supply to a central processing unit (CPU) chipset. The first electrical switch unit receives the second and third PWM signals to selectively output the second or third PWM signal to the second voltage converting circuit to output one of the first and second power supplies. The second electrical switch unit receives one of the first and second power supplies from the second voltage converting circuit to selectively output one of the first and second power supplies to the CPU chipset.

Abstract: A printed circuit board includes signal holes, at least one first securing hole, and at least one second securing hole. The signal holes and the first securing hole is able to secure a first electronic element or the signal holes and the second securing hole is able to secure a second electronic element.

Abstract: A voltage regulating circuit converts a first voltage and provides the converted first voltage to a first voltage pin of a north bridge chip after receiving a control signal from a south bridge chip. A second voltage pin of the north bridge chip is connected to a voltage converting circuit for receiving a second voltage. The logic control circuit receives a control signal from the super I/O chip and outputs a first control signal to turn on the switch to connect the first and the second voltage pins together. The logic control circuit also outputs a second control signal to the voltage regulating circuit to control the voltage regulating circuit to stop providing the converted first voltage to the first voltage pin of the north bridge chip. The voltage converting circuit provides the second voltage to the first voltage pin of the north bridge chip via the switch.

Abstract: A computer motherboard includes a display controller, a digital visual interface integrated (DVI-I) connector, and a switching unit. The switching unit includes four first terminals, two second terminals, and a control terminal. Two of the first terminals are respectively connected to clock and data pins of a first display data channel (DDC) of the display controller, the other two first terminals are respectively connected to clock and data pins of a second DDC of the display controller, and the second terminals are respectively connected to DDC clock and DDC data pins of the DVI-I connector. The control terminal is connected to a hot plug detect pin of the DVI-I connector to detect a voltage and correspondingly control the second terminals to be respectively connected to the two first terminals connected to the clock and data pins of the first DDC or the second DDC.

Abstract: A phone charging stand includes a casing and a cover. The casing has a socket on one surface to hold a phone, and a first universal serial bus (USB) connecting port on another surface of the casing is used to connect a wireless dongle having a USB interface. The cover is pivotally connected to one end of the casing. The cover can be rotated toward the socket to be attached to the casing to hold the phone. The cover can also be rotated toward the another surface of the casing to support the charging stand.

Abstract: The portable computer includes a PCIe controller, a DisplayPort connector, and a combination switch. The DisplayPort connector includes a hot plug pin. The combination switch is connected between the PCIe controller and the DisplayPort connector. The combination switch includes a selecting pin electronically connected to the hot plug pin. When the DisplayPort connector is electronically coupled to a discrete graphics card using PCIe, the hot plug pin sends a hot plug voltage signal to the selecting pin, and the combination switch electronically connects the DisplayPort connector to the PCIe controller after receiving the signal.

Abstract: A power control circuit for a hard disk drive (HDD) includes a first control circuit, a second control circuit, a first connector connected to a power supply, the first and second control circuits, and a second connector connected to the first control circuit and the HDD. The power supply outputs a first voltage signal and a second voltage signal to the first and second control circuits via the first connector. The first control circuit converts the first and second voltage signals into a form compatible with a timing sequence of the HDD receiving voltage signals, and outputs the first and second voltage signals to the HDD via the second connector. The second control circuit controls the first control circuit.