Patents by Inventor Yi Seul Han

Yi Seul Han has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12288728
    Abstract: In one example, a semiconductor device can comprise (a) an electronic device comprising a device top side, a device bottom side opposite the device top side, and a device sidewall between the device top side and the device bottom side, (b) a first conductor comprising, a first conductor side section on the device sidewall, a first conductor top section on the device top side and coupled to the first conductor side section, and a first conductor bottom section coupled to the first conductor side section, and (c) a protective material covering the first conductor and the electronic device. A lower surface of the first conductor top section can be higher than the device top side, and an upper surface of the first conductor bottom section can be lower than the device top side. Other examples and related methods are also disclosed herein.
    Type: Grant
    Filed: March 4, 2024
    Date of Patent: April 29, 2025
    Assignee: AMKOR TECHNOLOGY SINGAPORE HOLDING PTE. LTD.
    Inventors: Kyeong Tae Kim, Yi Seul Han, Jae Beom Shim, Tae Yong Lee
  • Patent number: 12278196
    Abstract: An electronic device includes a substrate having a conductive structure with a substrate outward terminal at a second side of the substrate. A dielectric structure with an opening is adjacent to the second side. An electronic component is coupled to the substrate and an encapsulant encapsulates the electronic component. The substrate outward terminal comprises a multi-via terminal or a multi-stage via. The multi-via terminal includes pad conductive vias in the opening, a pad dielectric via interposed between the pad conductive vias, and a conductor comprising a conductor top side with micro dimples over the pad conductive vias and the pad dielectric via. The multi-stage terminal includes a pad base within the opening having a top side recessed below an upper surface the dielectric and a pad head coupled to the pad base within the opening, the pad head having a top side with a micro dimple.
    Type: Grant
    Filed: October 31, 2023
    Date of Patent: April 15, 2025
    Assignee: Amkor Technology Singapore Holding Pte. Ltd.
    Inventors: Tae Ki Kim, Jae Beom Shim, Min Jae Yi, Yi Seul Han, Young Ju Lee, Kyeong Tae Kim
  • Publication number: 20240421127
    Abstract: In one example, a semiconductor device comprises a first base substrate comprising a first base conductive structure, a first encapsulant contacting a lateral side of the first base substrate, a redistribution structure (RDS) substrate over the base substrate and comprising an RDS conductive structure coupled with the first base conductive structure, a first electronic component over the RDS substrate and over a first component terminal coupled with the RDS conductive structure, and a second encapsulant over the RDS substrate and contacting a lateral side of the first electronic component. Other examples and related methods are also disclosed herein.
    Type: Application
    Filed: August 30, 2024
    Publication date: December 19, 2024
    Applicant: Amkor Technology Singapore Holding Pte. Ltd.
    Inventors: Yi Seul Han, Tae Yong Lee, Ji Yeon Ryu, Won Chul Do, Jin Young Khim, Shaun Bowers, Ron Huemoeller
  • Patent number: 12080682
    Abstract: In one example, a semiconductor device comprises a first base substrate comprising a first base conductive structure, a first encapsulant contacting a lateral side of the first base substrate, a redistribution structure (RDS) substrate over the base substrate and comprising an RDS conductive structure coupled with the first base conductive structure, a first electronic component over the RDS substrate and over a first component terminal coupled with the RDS conductive structure, and a second encapsulant over the RDS substrate and contacting a lateral side of the first electronic component. Other examples and related methods are also disclosed herein.
    Type: Grant
    Filed: February 6, 2023
    Date of Patent: September 3, 2024
    Assignee: Amkor Technology Singapore Holding Pte. Ltd.
    Inventors: Yi Seul Han, Tae Yong Lee, Ji Yeon Ryu, Won Chul Do, Jin Young Khim, Shaun Bowers, Ron Huemoeller
  • Publication number: 20240266238
    Abstract: In one example, a semiconductor device can comprise (a) an electronic device comprising a device top side, a device bottom side opposite the device top side, and a device sidewall between the device top side and the device bottom side, (b) a first conductor comprising, a first conductor side section on the device sidewall, a first conductor top section on the device top side and coupled to the first conductor side section, and a first conductor bottom section coupled to the first conductor side section, and (c) a protective material covering the first conductor and the electronic device. A lower surface of the first conductor top section can be higher than the device top side, and an upper surface of the first conductor bottom section can be lower than the device top side. Other examples and related methods are also disclosed herein.
    Type: Application
    Filed: March 4, 2024
    Publication date: August 8, 2024
    Inventors: Kyeong Tae Kim, Yi Seul Han, Jae Beom Shim, Tae Yong Lee
  • Publication number: 20240186213
    Abstract: In one example, an electronic device includes a substrate and a cover structure. The cover structure includes an upper cover wall comprising an upper wall outer surface and an upper wall inner surface opposite to the upper wall outer surface, cover sidewalls extending from the upper wall inner surface and coupled to the substrate. The upper cover wall and the cover sidewalls define a cavity. A channel structure is in the upper cover wall extending inward from the upper wall inner surface. A first electronic component is coupled to the substrate within the cavity and a thermal interface material (TIM) is coupled to the upper wall inner surface and the first electronic component. A portion of the TIM is within the channel structure. Other examples and related methods are also disclosed herein.
    Type: Application
    Filed: December 6, 2022
    Publication date: June 6, 2024
    Applicant: Amkor Technology Singapore Holding Pte. Ltd.
    Inventors: Jae Jin REE, Sang Hyeon LEE, Yi Seul HAN, Geon Du GIM, Hun Jung LIM
  • Publication number: 20240178206
    Abstract: In one example, an electronic device includes a first substrate and a second substrate. The first substrate includes a substrate first side, a substrate second side, and a first conductive structure. An inner electronic component is coupled to the first conductive structure proximate to the substrate second side. An outer electronic component is coupled to the first conductive structure proximate to the substrate first side. The outer electronic component includes a body and a groove in the body configured to couple with an external interconnect. Inner interconnects couple the first substrate to the second substrate. The first substrate, the second substrate, the inner electronic component, and the outer electronic component are in a stacked configuration. The inner electronic component is interposed between the first substrate and the second substrate. Other examples and related methods are also disclosed herein.
    Type: Application
    Filed: November 27, 2022
    Publication date: May 30, 2024
    Applicant: Amkor Technology Singapore Holding Pte. Ltd.
    Inventors: Sang Hyeon LEE, Kyoung Yeon LEE, Jae Beom SHIM, Yi Seul HAN, Ji Yeon RYU, Woo Jun KIM
  • Patent number: 11978687
    Abstract: In one example, a semiconductor device can comprise (a) an electronic device comprising a device top side, a device bottom side opposite the device top side, and a device sidewall between the device top side and the device bottom side, (b) a first conductor comprising, a first conductor side section on the device sidewall, a first conductor top section on the device top side and coupled to the first conductor side section, and a first conductor bottom section coupled to the first conductor side section, and (c) a protective material covering the first conductor and the electronic device. A lower surface of the first conductor top section can be higher than the device top side, and an upper surface of the first conductor bottom section can be lower than the device top side. Other examples and related methods are also disclosed herein.
    Type: Grant
    Filed: January 13, 2023
    Date of Patent: May 7, 2024
    Assignee: AMKOR TECHNOLOGY SINGAPORE HOLDING PTE. LTD.
    Inventors: Kyeong Tae Kim, Yi Seul Han, Jae Beom Shim, Tae Yong Lee
  • Publication number: 20240063145
    Abstract: An electronic device includes a substrate having a conductive structure with a substrate outward terminal at a second side of the substrate. A dielectric structure with an opening is adjacent to the second side. An electronic component is coupled to the substrate and an encapsulant encapsulates the electronic component. The substrate outward terminal comprises a multi-via terminal or a multi-stage via. The multi-via terminal includes pad conductive vias in the opening, a pad dielectric via interposed between the pad conductive vias, and a conductor comprising a conductor top side with micro dimples over the pad conductive vias and the pad dielectric via. The multi-stage terminal includes a pad base within the opening having a top side recessed below an upper surface the dielectric and a pad head coupled to the pad base within the opening, the pad head having a top side with a micro dimple.
    Type: Application
    Filed: October 31, 2023
    Publication date: February 22, 2024
    Applicant: Amkor Technology Singapore Holding Pte. Ltd.
    Inventors: Tae Ki KIM, Jae Beom SHIM, Min Jae YI, Yi Seul HAN, Young Ju LEE, Kyeong Tae KIM
  • Patent number: 11830823
    Abstract: In one example, an electronic device includes a substrate having a conductive structure. The conductive structure includes a substrate inward terminal at a first side of the substrate and a substrate outward terminal at a second side of the substrate. The substrate includes a dielectric structure with a first opening is at the second side. An electronic component is at the first side of the substrate and is electrically coupled to the substrate inward terminal, and an encapsulant encapsulates the electronic component. The substrate outward terminal comprises one of a multi-via terminal or a multi-stage via. The multi-via terminal includes pad conductive vias in the first opening a pad dielectric via interposed between the pad conductive vias in the first opening and a conductor comprising a conductor top side with micro dimples over the pad conductive vias and the pad dielectric via.
    Type: Grant
    Filed: September 9, 2020
    Date of Patent: November 28, 2023
    Assignee: Amkor Technology Singapore Holding Pte. Ltd.
    Inventors: Tae Ki Kim, Jae Beom Shim, Min Jae Yi, Yi Seul Han, Young Ju Lee, Kyeong Tae Kim
  • Publication number: 20230253279
    Abstract: In one example, a semiconductor device can comprise (a) an electronic device comprising a device top side, a device bottom side opposite the device top side, and a device sidewall between the device top side and the device bottom side, (b) a first conductor comprising, a first conductor side section on the device sidewall, a first conductor top section on the device top side and coupled to the first conductor side section, and a first conductor bottom section coupled to the first conductor side section, and (c) a protective material covering the first conductor and the electronic device. A lower surface of the first conductor top section can be higher than the device top side, and an upper surface of the first conductor bottom section can be lower than the device top side. Other examples and related methods are also disclosed herein.
    Type: Application
    Filed: January 13, 2023
    Publication date: August 10, 2023
    Inventors: Kyeong Tae Kim, Yi Seul Han, Jae Beom Shim, Tae Yong Lee
  • Publication number: 20230187410
    Abstract: In one example, a semiconductor device comprises a first base substrate comprising a first base conductive structure, a first encapsulant contacting a lateral side of the first base substrate, a redistribution structure (RDS) substrate over the base substrate and comprising an RDS conductive structure coupled with the first base conductive structure, a first electronic component over the RDS substrate and over a first component terminal coupled with the RDS conductive structure, and a second encapsulant over the RDS substrate and contacting a lateral side of the first electronic component. Other examples and related methods are also disclosed herein.
    Type: Application
    Filed: February 6, 2023
    Publication date: June 15, 2023
    Applicant: Amkor Technology Singapore Holding Pte. Ltd.
    Inventors: Yi Seul Han, Tae Yong Lee, Ji Yeon Ryu, Won Chul Do, Jin Young Khim, Shaun Bowers, Ron Huemoeller
  • Patent number: 11574890
    Abstract: In one example, a semiconductor device comprises a first base substrate comprising a first base conductive structure, a first encapsulant contacting a lateral side of the first base substrate, a redistribution structure (RDS) substrate over the base substrate and comprising an RDS conductive structure coupled with the first base conductive structure, a first electronic component over the RDS substrate and over a first component terminal coupled with the RDS conductive structure, and a second encapsulant over the RDS substrate and contacting a lateral side of the first electronic component. Other examples and related methods are also disclosed herein.
    Type: Grant
    Filed: July 1, 2020
    Date of Patent: February 7, 2023
    Assignee: Amkor Technology Singapore Holding Pte. Lte.
    Inventors: Yi Seul Han, Tae Yong Lee, Ji Yeon Ryu, Won Chul Do, Jin Young Khim, Shaun Bowers, Ron Huemoeller
  • Patent number: 11569176
    Abstract: A semiconductor device and a method of manufacturing a semiconductor device. As a non-limiting example, various aspects of this disclosure provide a semiconductor device comprising multiple encapsulating layers and multiple signal distribution structures, and a method of manufacturing thereof.
    Type: Grant
    Filed: March 21, 2017
    Date of Patent: January 31, 2023
    Assignee: AMKOR TECHNOLOGY SINGAPORE HOLDING PTE. LTD.
    Inventors: Yi Seul Han, Tae Yong Lee, Ji Yeon Ryu
  • Patent number: 11557524
    Abstract: In one example, a semiconductor device can comprise (a) an electronic device comprising a device top side, a device bottom side opposite the device top side, and a device sidewall between the device top side and the device bottom side, (b) a first conductor comprising, a first conductor side section on the device sidewall, a first conductor top section on the device top side and coupled to the first conductor side section, and a first conductor bottom section coupled to the first conductor side section, and (c) a protective material covering the first conductor and the electronic device. A lower surface of the first conductor top section can be higher than the device top side, and an upper surface of the first conductor bottom section can be lower than the device top side. Other examples and related methods are also disclosed herein.
    Type: Grant
    Filed: May 24, 2021
    Date of Patent: January 17, 2023
    Assignee: AMKOR TECHNOLOGY SINGAPORE HOLDING PTE. LTD.
    Inventors: Kyeong Tae Kim, Yi Seul Han, Jae Beom Shim, Tae Yong Lee
  • Publication number: 20220415733
    Abstract: In one example, an electronic device comprises a cavity substrate comprising a substrate base comprising a top side and a bottom side and a cavity wall over the substrate base and defining a cavity, an electronic component over the substrate base and in the cavity, a lid comprising a top side and a bottom side, wherein the lid is over the substrate base and the cavity wall to define an interior of the cavity and an exterior of the cavity, an adhesive between the bottom side of the lid and a top side of the cavity wall, and a vent seal between the interior of the cavity and the exterior of the cavity. Other examples and related methods are also disclosed herein.
    Type: Application
    Filed: June 29, 2021
    Publication date: December 29, 2022
    Applicant: Amkor Technology Singapore Holding Pte. Ltd.
    Inventors: Kwang Seok Oh, Chang Uk Jang, Jin Seok Ryu, Seung Jae Yu, Weilung Lu, Adrian Arcedera, Seung Mo Kim, Kyung Han Ryu, Yi Seul Han, Woo Jun Kim, Tae Yong Lee
  • Publication number: 20220077077
    Abstract: In one example, an electronic device includes a substrate having a conductive structure. The conductive structure includes a substrate inward terminal at a first side of the substrate and a substrate outward terminal at a second side of the substrate. The substrate includes a dielectric structure with a first opening is at the second side. An electronic component is at the first side of the substrate and is electrically coupled to the substrate inward terminal, and an encapsulant encapsulates the electronic component. The substrate outward terminal comprises one of a multi-via terminal or a multi-stage via. The multi-via terminal includes pad conductive vias in the first opening a pad dielectric via interposed between the pad conductive vias in the first opening and a conductor comprising a conductor top side with micro dimples over the pad conductive vias and the pad dielectric via.
    Type: Application
    Filed: September 9, 2020
    Publication date: March 10, 2022
    Applicant: Amkor Technology Singapore Holding Pte. Ltd.
    Inventors: Tae Ki KIM, Jae Beom SHIM, Min Jae YI, Yi Seul HAN, Young Ju LEE, Kyeong Tae KIM
  • Publication number: 20220077074
    Abstract: A semiconductor device and a method of manufacturing a semiconductor device. As a non-limiting example, various aspects of this disclosure provide a semiconductor device comprising one or more conductive shielding members and an EMI shielding layer, and a method of manufacturing thereof.
    Type: Application
    Filed: July 12, 2021
    Publication date: March 10, 2022
    Inventors: Yi Seul Han, Tae Yong Lee, Ji Yeon Ryu
  • Publication number: 20220005787
    Abstract: In one example, a semiconductor device comprises a first base substrate comprising a first base conductive structure, a first encapsulant contacting a lateral side of the first base substrate, a redistribution structure (RDS) substrate over the base substrate and comprising an RDS conductive structure coupled with the first base conductive structure, a first electronic component over the RDS substrate and over a first component terminal coupled with the RDS conductive structure, and a second encapsulant over the RDS substrate and contacting a lateral side of the first electronic component. Other examples and related methods are also disclosed herein.
    Type: Application
    Filed: July 1, 2020
    Publication date: January 6, 2022
    Applicant: Amkor Technology Singapore Holding Pte. Ltd.
    Inventors: Yi Seul Han, Tae Yong Lee, Ji Yeon Ryu, Won Chul Do, Jin Young Khim, Shaun Bowers, Ron Huemoeller
  • Publication number: 20210280484
    Abstract: In one example, a semiconductor device can comprise (a) an electronic device comprising a device top side, a device bottom side opposite the device top side, and a device sidewall between the device top side and the device bottom side, (b) a first conductor comprising, a first conductor side section on the device sidewall, a first conductor top section on the device top side and coupled to the first conductor side section, and a first conductor bottom section coupled to the first conductor side section, and (c) a protective material covering the first conductor and the electronic device. A lower surface of the first conductor top section can be higher than the device top side, and an upper surface of the first conductor bottom section can be lower than the device top side. Other examples and related methods are also disclosed herein.
    Type: Application
    Filed: May 24, 2021
    Publication date: September 9, 2021
    Inventors: Kyeong Tae Kim, Yi Seul Han, Jae Beom Shim, Tae Yong Lee