Abstract: A case includes a housing, a cover and a switch module with a secure mechanism. The case has an accommodation portion. The cover is disposed on the case to have a cover position. The cover covers the accommodation portion. The switch module including a pressing switch and a switch-changing element is located in the accommodation portion and connected to the housing. The switch-changing includes a first pivot part, a pressing part, and a stop part. The first pivot part pivots the housing. The pressing part and the stop part jut from the first pivot part along different radial directions. The switch-changing element has a test position and a non-test position for rotating relative to the housing. When the switch-changing element locates at the test position, a position of the position of the stop part overlaps the cover position.

Abstract: A method for fabricating non-volatile memory device is disclosed. The method includes the steps of: providing a substrate having a stack structure thereon; performing a first oxidation process to form a first oxide layer on the substrate and the stack structure; etching the first oxide layer for forming a first spacer adjacent to the stack structure; performing a second oxidation process to form a second oxide layer on the substrate; forming a dielectric layer on the first spacer and the second oxide layer; and etching the dielectric layer for forming a second spacer.

Abstract: A semiconductor process is described. A semiconductor substrate having a memory area, a first device area and a second device area is provided. A patterned charge-trapping layer is formed on the substrate, covering the memory area and the second device area but exposing the first device area. A first gate oxide layer is formed in the first device area. The charge-trapping layer in the second device area is removed. A second gate oxide layer is formed in the second device area.

Abstract: A electronic device includes a chassis, a panel, a cover and a security structure. The panel covers a side of the chassis. The cover covers another side of the chassis. The security structure includes a locking component, a positioning component and a linking shaft. The locking component is disposed on the panel and interfered with the chassis to lock the panel. The positioning component is disposed on the cover and interfered with the chassis to position the cover. The linking shaft is disposed between the locking component and the positioning component and stops the positioning component from being separated from the chassis. When a position of the locking component is adjusted to release the interference between the locking component and the chassis, the linking shaft is driven by the locking component to release the positioning component.

Abstract: An ESD module includes an ESD circuit coupled between a first source and a second source. A trigger circuit is also included in the ESD module for activating the ESD circuit to provide a low resistance current path between the first and second sources. The trigger circuit includes a reverse diode between the first source and the ESD circuit or between the second source and main ESD circuit. The trigger circuit provides a low trigger voltage to activate the ESD circuit.

Abstract: Method and server system for location sharing are disclosed. The method includes: determining a motion state of a first user in accordance with respective information items related to a current location and a previous location of a first device associated with the first user; in accordance with a determination that the motion state of the first user is a stationary state, determining a user direction of the first user based an orientation of the first device associated with the current location; in accordance with a determination that the motion state of the first user is a moving state, determining the user direction of the first user based on a motion direction from the previous location to the current location of the first device; and sending the determined user direction of the first user to one or more second devices associated with one or more second users for location sharing.

Abstract: The present invention provides a method of fabricating a memory structure, especially forming an oxide on top of a spacer to prevent the spacer from being over-etched, the method comprising the steps of: providing a semiconductor substrate; forming a charge trapping layer, a first conducting layer and a capping layer as a gate stack on the substrate; forming a first gate structure by patterning; a plurality of spacers are patterned and disposed adjacent to the sidewall of said gate stack; depositing a second conducting layer on the substrate to cover the first gate structure and the spacer; selectively etching the second conducting layer to expose the top of the spacer; performing an oxidation process to form an oxide on top of the spacer.

Abstract: Methods, devices and systems for sharing information related to exercise/health activities are disclosed. A user terminal can acquire a device identifier associated with a health monitoring device, such as a monitoring wristband or a treadmill, through a communication program (e.g., an instant messaging application). The user terminal can communicate with a server of the communication program so that the server binds the device identifier with a user ID. The association of the user ID and the device identifier allows the user to share the health monitoring information from the health monitoring device with other users through the server. In addition, the connected users can participate in real-time competitions and share information related to the competition. The server also generates ranking lists or other sharing formats for the competition, improving user experience and making exercise and competition more attractive.

Abstract: A flash memory structure includes a memory gate on a substrate, a select gate adjacent to the memory gate, and an oxide-nitride spacer between the memory gate and the select gate, where the oxide-nitride spacer further includes an oxide layer and a nitride layer having an upper nitride portion and a lower nitride portion, and the upper nitride portion is thinner than the lower nitride portion.

Abstract: A semiconductor process is described. A semiconductor substrate having a memory area, a first device area and a second device area is provided. A patterned charge-trapping layer is formed on the substrate, covering the memory area and the second device area but exposing the first device area. A first gate oxide layer is formed in the first device area. The charge-trapping layer in the second device area is removed. A second gate oxide layer is formed in the second device area.

Abstract: An abnormal connection detection method is used between a power supplier and a power receiver. The power supplier and the power receiver are connected through a cable. The cable includes positive and negative power transmission lines. The abnormal connection detection method includes: providing an output voltage from the power supplier, wherein the output voltage is lower than a predetermined voltage threshold; detecting, according to the output voltage, whether an output current generated by the power supplier is higher than a predetermined current threshold; and when the output current is higher than the predetermined current threshold, determining that an abnormal connection occurs between the power supplier and the power receiver.

Abstract: A method for confirming correctness of a signal includes: providing a current to flow through a time-dependent impedance circuit, wherein the time-dependent impedance circuit provides at least two resistances at two different time points, the current flowing through the time-dependent impedance circuit to generate a first voltage at a first time point, and the current flowing through the time-dependent impedance circuit to generate a second voltage at a second time point, the first voltage and the second voltage being different from each other. When a predetermined relationship exists between the first voltage and the second voltage, it is confirmed that a signal provided from a node coupled to the time-dependent impedance circuit is correct.

Abstract: A method includes forming a hard mask over a substrate, patterning the hard mask to form a first plurality of trenches, and filling a dielectric material into the first plurality of trenches to form a plurality of dielectric regions. The hard mask is removed from between the plurality of dielectric regions, wherein a second plurality of trenches is left by the removed hard mask. An epitaxy step is performed to grow a semiconductor material in the second plurality of trenches.

Abstract: A electronic device includes a chassis, a panel, a cover and a security structure. The panel covers a side of the chassis. The cover covers another side of the chassis. The security structure includes a locking component, a positioning component and a linking shaft. The locking component is disposed on the panel and interfered with the chassis to lock the panel. The positioning component is disposed on the cover and interfered with the chassis to position the cover. The linking shaft is disposed between the locking component and the positioning component and stops the positioning component from being separated from the chassis. When a position of the locking component is adjusted to release the interference between the locking component and the chassis, the linking shaft is driven by the locking component to release the positioning component.

Abstract: The present invention provides a memory cell, which includes a substrate, a gate dielectric layer, a patterned material layer, a selection gate and a control gate. The gate dielectric layer is disposed on the substrate. The patterned material layer is disposed on the substrate, wherein the patterned material layer comprises a vertical portion and a horizontal portion. The selection gate is disposed on the gate dielectric layer and atone side of the vertical portion of the patterned material layer. The control gate is disposed on the horizontal portion of the patterned material layer and at another side of the vertical portion, wherein the vertical portion protrudes over a top of the selection gate. The present invention further provides another embodiment of a memory cell and manufacturing methods thereof.

Abstract: A case includes a housing, a cover and a switch module with a secure mechanism. The case has an accommodation portion. The cover is disposed on the case to have a cover position. The cover covers the accommodation portion. The switch module including a pressing switch and a switch-changing element is located in the accommodation portion and connected to the housing. The switch-changing includes a first pivot part, a pressing part, and a stop part. The first pivot part pivots the housing. The pressing part and the stop part jut from the first pivot part along different radial directions. The switch-changing element has a test position and a non-test position for rotating relative to the housing. When the switch-changing element locates at the test position, a position of the position of the stop part overlaps the cover position.

Abstract: A method for uploading a media file to an online service, an electronic device using the same, and a non-transitory storage medium are provided. In the present method, a plurality of upload rules corresponding to an online service are obtained. A media capture application is initiated on an electronic device. A media file captured by using the media capture application is automatically uploaded to the online service in accordance with the upload rules. Accordingly, the user only has to launch the media capture application to capture the media file, then the captured media file is automatically uploaded to the specific online service without launching an application of the online service.

Abstract: A method, system and terminal for deleting a sent instant message in messaging communication have been disclosed. The method including: receiving from a first communication terminal, a delete request to delete a sent instant message which has been transmitted from the first communication terminal to a second communication terminal, wherein the delete request comprises an identification which identifies the sent instant message which is to be deleted; determining whether the sent instant message which is to be deleted has already been successfully forwarded to the second communication terminal; and if it is determined that the sent instant message which is to be deleted has already been successfully forwarded to the second communication terminal, forwarding the delete request to the second communication terminal to facilitate deletion of the sent instant message by the second communication terminal.

Abstract: A layout structure for memory devices includes a plurality of first gate patterns, a plurality of first landing pad patterns, a plurality of dummy patterns, a plurality of second landing pad patterns, and a plurality of second gate patterns. The first landing pad patterns are parallel with each other and electrically connected to the first gate patterns. The dummy patterns and the first landing pad patterns are alternately arranged, and the second landing pad patterns are respectively positioned in between one first landing pad pattern and one dummy pattern. The second gate patterns are electrically connected to the second landing pad patterns.

Abstract: A layout structure for memory devices includes a plurality of first gate patterns, a plurality of first landing pad patterns, a plurality of dummy patterns, a plurality of second landing pad patterns, and a plurality of second gate patterns. The first landing pad patterns are parallel with each other and electrically connected to the first gate patterns. The dummy patterns and the first landing pad patterns are alternately arranged, and the second landing pad patterns are respectively positioned in between one first landing pad pattern and one dummy pattern. The second gate patterns are electrically connected to the second landing pad patterns.