Patents by Inventor Yi Shan

Yi Shan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11101399
    Abstract: A single-photon detector is provided. The detector has multiple avalanche layers. It has an avalanche photodiode (APD) structure using single photon. The APD is made of indium aluminum arsenide (InAlAs). At least two avalanche layers are designed. When the layer for avalanche is numbered only one and the gain is very big, the speed will be deteriorated very quickly. With the design of two avalanche layers in the present invention for the very big gain, the speed deterioration can be suppressed. After measuring, the present invention shows a faster speed as compared to prior arts. It proves that, by using more than two avalanche layers, the present invention effectively improves the feature of single-photon detector. Hence, the present invention is especially suitable for single-photon detection.
    Type: Grant
    Filed: June 5, 2020
    Date of Patent: August 24, 2021
    Assignee: National Central University
    Inventors: Jin-Wei Shi, Yi-Shan Lee
  • Patent number: 11093225
    Abstract: A high parallelism computing system and instruction scheduling method thereof are disclosed. The computing system comprises: an instruction reading and distribution module for reading a plurality of types of instructions in a specific order, and distributing the acquired instructions to corresponding function modules according to the types; an internal buffer for buffering data and instructions for performing computation; a plurality of function modules each of which sequentially executes instructions of the present type distributed by the instruction reading and distribution module and reads the data from the internal buffer; and wherein the specific order is obtained by topologically sorting the instructions according to a directed acyclic graph consisting of the types and dependency relationships.
    Type: Grant
    Filed: June 27, 2019
    Date of Patent: August 17, 2021
    Assignee: Xilinx, Inc.
    Inventors: Qian Yu, Lingzhi Sui, Shaoxia Fang, Junbin Wang, Yi Shan
  • Patent number: 11044219
    Abstract: A message forwarding method performed at an electronic device having one or more processors and memory storing a plurality of programs for forwarding messages using an instant messaging application, includes: displaying a dialog box including one or more chat messages associated with a first user account of the instant messaging application; selecting one or more chat messages in the dialog box; obtaining message content and associated information of each selected chat message, the associated information including one or more of: a message sender and a sending time of the chat message, a group name of a group corresponding to the dialog box, identifiers of participants of the group; and forwarding the message content and the associated information of each chat message to a second user account of the instant messaging application.
    Type: Grant
    Filed: September 10, 2019
    Date of Patent: June 22, 2021
    Assignee: TENCENT TECHNOLOGY (SHENZHEN) COMPANY LIMITED
    Inventors: Jun Wang, Tingji Liu, Han Li, Song Chai, Xucheng Tang, Yi Shan
  • Publication number: 20210175343
    Abstract: A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a first barrier layer on a substrate; forming a p-type semiconductor layer on the first barrier layer; forming a hard mask on the p-type semiconductor layer; patterning the hard mask and the p-type semiconductor layer; and forming a spacer adjacent to the hard mask and the p-type semiconductor layer.
    Type: Application
    Filed: December 31, 2019
    Publication date: June 10, 2021
    Inventors: Bo-Rong Chen, Che-Hung Huang, Chun-Ming Chang, Yi-Shan Hsu, Chih-Tung Yeh, Shin-Chuan Huang, Wen-Jung Liao, Chun-Liang Hou
  • Patent number: 10995985
    Abstract: A drying apparatus includes a gas flow channel, a first hollow fiber module, a second hollow fiber module, a gas driver and a control unit. The gas flow channel is used to accommodate an article and has a first terminal and a second terminal. The first and second hollow fiber modules are disposed at the first and second terminals respectively to adsorb water or to be electrified to desorb water. The gas driver disposed in a gas flow path of the gas flow channel drives the gas flowing into the gas flow channel through the first hollow fiber module and flowing out from the gas flow channel through the second hollow fiber module, or flowing into the gas flow channel through the second hollow fiber module and flowing out from the gas flow channel through the first hollow fiber module. The control unit provides power to the first and second hollow fiber modules and controls the gas driver.
    Type: Grant
    Filed: April 14, 2016
    Date of Patent: May 4, 2021
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chin-Chih Tai, Yi-Shan Lee, Yun-Hsin Wang, Cheng-Fu Hsu
  • Publication number: 20210124105
    Abstract: A backlight module comprises a frame unit, a plurality of light-emitting units, a first optical unit and a second optical unit. The frame unit includes a metal rear frame. The metal rear frame has a first carrying portion, and a second carrying portion spaced from the first carrying portion. The first carrying portion and the second carrying portion are not at the same height. One of the plurality of light-emitting units is disposed on the first carrying portion, and another one of the plurality of light-emitting units is disposed on the second carrying portion. The first optical unit is configured to receive the light generated from the light-emitting unit disposed on the first carrying portion, and the second optical unit is configured to receive the light generated from the light-emitting unit disposed on the second carrying portion. Through the structure of the metal rear frame, the light-emitting unit can directly contact the metal rear frame and the heat dissipation efficiency can be enhanced.
    Type: Application
    Filed: August 13, 2020
    Publication date: April 29, 2021
    Inventors: Lin-Yu HUANG, Yi-Shan LIN, Ching-Chieh YEH
  • Patent number: 10984308
    Abstract: The present invention relates to artificial neural networks, for example, deep neural networks. In particular, the present invention relates to a compression method considering load balance for deep neural networks and the device thereof. More specifically, the present invention relates to how to compress dense neural networks into sparse neural networks in an efficient way so as to improve utilization of resources of the hardware platform.
    Type: Grant
    Filed: December 26, 2016
    Date of Patent: April 20, 2021
    Assignee: XILINX TECHNOLOGY BEIJING LIMITED
    Inventors: Xin Li, Song Han, Zhilin Lu, Yi Shan
  • Patent number: 10936941
    Abstract: The technical disclosure relates to artificial neural network. In particular, the technical disclosure relates to how to implement efficient data access control in the neural network hardware acceleration system. Specifically, it proposes an overall design of a device that can process data receiving, bit-width transformation and data storing. By employing the technical disclosure, neural network hardware acceleration system can avoid the data access process becomes the bottleneck in neural network computation.
    Type: Grant
    Filed: December 26, 2016
    Date of Patent: March 2, 2021
    Assignee: XILINX, INC.
    Inventors: Yubin Li, Song Han, Yi Shan
  • Publication number: 20210043808
    Abstract: An embodiment of the present invention provides a micro light emitting diode (LED) array and its manufacturing method. The micro-LED includes a substrate, an epitaxial layer formed on the substrate, and a conversion film formed on the epitaxial layer. Pixels can be defined through lithography, and the pixel size can be very small. This method is characterized in that a mass transfer is not required.
    Type: Application
    Filed: January 7, 2020
    Publication date: February 11, 2021
    Inventors: Ching-Fuh Lin, Chun-Yu Lin, Yi-Shan Lin, Jung-Kuan Huang
  • Publication number: 20210031880
    Abstract: A transmission device for a bicycle includes a housing, a mandrel, an assembling member, a transmission assembly, a derailleur assembly and a clutch assembly. The mandrel is rotatably disposed on the housing and extends along an axial direction. The assembling member has a driving gear. The transmission assembly is rotatably disposed on the housing and engaged with the driving gear. The derailleur assembly includes a first derailleur gear and a second derailleur gear. The transmission assembly is engaged with the first derailleur gear and the second derailleur gear. The clutch assembly includes a clutch member.
    Type: Application
    Filed: August 1, 2019
    Publication date: February 4, 2021
    Inventors: WEN-KUEI LIU, CHAO-HSUAN LIU, YU-CHUN LIU, YI-SHAN LIU
  • Patent number: 10901797
    Abstract: Techniques for allocating resources including receiving a first sub-stream of a data stream associated with a job and determining a dependency of a plurality of stages of the job. The techniques further include determining a metric for a second sub-stream of the data stream, where processing of the second sub-stream is completed and the metric indicates information associated with the processing of the second sub-stream. The techniques further include allocating resources for processing the first sub-stream based at least in part on the metric and the dependency.
    Type: Grant
    Filed: November 6, 2018
    Date of Patent: January 26, 2021
    Assignee: International Business Machines Corporation
    Inventors: Qing Xu, Yi Shan Jiang, Zhi Xiong Pan, Ting Ting Wen
  • Patent number: 10902315
    Abstract: The present disclosure relates to a processor for implementing artificial neural networks, for example, convolutional neural networks. The processor includes a memory controller group, an on-chip bus and a processor core, wherein the processor core further includes a register map, an instruction module, a data transferring controller, a data writing scheduling unit, a buffer module, a convolution operation unit and a hybrid computation unit. The processor of the present disclosure may be used for implementing various neural networks with increased computation efficiency.
    Type: Grant
    Filed: May 22, 2017
    Date of Patent: January 26, 2021
    Assignee: XILINX, INC.
    Inventors: Shaoxia Fang, Lingzhi Sui, Qian Yu, Junbin Wang, Yi Shan
  • Publication number: 20210008847
    Abstract: An elastic object, adapted for cushioning, gripping, pressing or grasping uses, includes an elastic body and an elastic cloth layer wrapping and covering the exterior of the elastic body in a tight contacting manner. The elastic cloth layer is closely bonded on the elastic body in such a manner that the elastic body and the elastic cloth layer are deformed simultaneously in response to an applied external force, and that the elastic body and the elastic cloth layer restore their original shapes when the applied external force vanishes. Because the elastic body is covered and enclosed by the elastic cloth layer, it prevents human body from directly contacting the elastic body. Therefore, plasticizer or other chemicals of the elastic body will not be left on the user's hands, which ensures better safety and expands the applications of the elastic object with better usability and utility.
    Type: Application
    Filed: July 9, 2020
    Publication date: January 14, 2021
    Inventors: YI-SHAN HSIAO, HONG-HSI HSIAO
  • Publication number: 20200388529
    Abstract: A semiconductor structure includes a semiconductor substrate, a metal layer, an interlayer dielectric (ILD) layer. The metal layer is disposed over the semiconductor substrate. The ILD layer is over the semiconductor substrate and laterally surrounding the metal layer, in which the ILD layer has a first portion in contact with a first sidewall of the metal layer and a second portion in contact with a second sidewall of the metal layer opposite to the first sidewall of the metal layer, and a width of the first portion of the ILD layer decreases as a distance from the semiconductor substrate increases.
    Type: Application
    Filed: August 21, 2020
    Publication date: December 10, 2020
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yi-Shan CHEN, Chan-Syun David YANG, Li-Te LIN, Pin-Yen LIN
  • Patent number: 10832123
    Abstract: The present invention relates to artificial neural networks, for example, deep neural networks. In particular, the present invention relates to a compression method for deep neural networks with proper use of mask and the device thereof. More specifically, the present invention relates to how to compress dense neural networks into sparse neural networks while maintaining or even improving the accuracy of the neural networks after compression.
    Type: Grant
    Filed: December 26, 2016
    Date of Patent: November 10, 2020
    Assignee: XILINX TECHNOLOGY BEIJING LIMITED
    Inventors: Shijie Sun, Song Han, Xin Li, Yi Shan
  • Publication number: 20200350743
    Abstract: A tunable laser has a solid state laser medium with optical gain region and generates coherent radiation through a facet. A lens collects the coherent radiation and generates a collimated light beam. An external cavity includes a reflective surface and an optical filter, the reflective surface reflecting the collimated beam back to the lens and laser medium, the optical filter positioned between the reflective surface and the lens and having two surfaces and a thermally tunable optical transmission band within the optical gain region of the laser medium. The optical filter (1) transmits a predominant portion of the collimated beam at a desired wavelength of operation, and (2) specularly reflects a remaining portion of the collimated beam from each surface, the collimated beam being incident on the optical filter such that the reflected collimated beams propagate at a non-zero angle with respect to the incident collimated beam.
    Type: Application
    Filed: July 17, 2020
    Publication date: November 5, 2020
    Inventors: Eugene Yi-Shan Ma, Charles McAlister Marshall
  • Patent number: 10824939
    Abstract: The present disclosure relates to a processor for implementing artificial neural networks, for example, convolutional neural networks. The processor includes a memory controller group, an on-chip bus and a processor core, wherein the processor core further includes a register map, an instruction module, a data transferring controller, a data writing scheduling unit, a buffer pool, a data reading scheduling unit and a computation module. The processor of the present disclosure may be used for implementing various neural networks with increased computation efficiency.
    Type: Grant
    Filed: May 22, 2017
    Date of Patent: November 3, 2020
    Assignee: XILINX, INC.
    Inventors: Shaoxia Fang, Lingzhi Sui, Qian Yu, Junbin Wang, Yi Shan
  • Patent number: 10810484
    Abstract: The present technical disclosure relates to artificial neural networks, e.g., gated recurrent unit (GRU). In particular, the present technical disclosure relates to how to implement a hardware accelerator for compressed GRU based on an embedded FPGA. Specifically, it proposes an overall design processing method of matrix decoding, matrix-vector multiplication, vector accumulation and activation function. In another aspect, the present technical disclosure proposes an overall hardware design to implement and accelerate the above process.
    Type: Grant
    Filed: December 27, 2016
    Date of Patent: October 20, 2020
    Assignee: XILINX, INC.
    Inventors: Dongliang Xie, Song Han, Yi Shan
  • Publication number: 20200311549
    Abstract: Provided in the present disclosure is a method of pruning a convolutional neural network based on feature map variation. The present invention enables compression of an entire network by means of removing a portion of filters in a convolutional layer, and such process is called pruning. A main contribution of the present invention is determining a pruning rule for filters in a single convolutional layer according to a feature map variation condition, using the rule to analyze network sensitivity, and pruning the entire network according to the network sensitivity.
    Type: Application
    Filed: May 16, 2018
    Publication date: October 1, 2020
    Inventors: Yu WANG, Fan JIANG, Xiao SHENG, Song HAN, Yi SHAN
  • Patent number: RE48588
    Abstract: A storage unit combining module capable of loading a plurality of storage units, and a storage unit moving suit having several storage unit combining modules and a related server apparatus are disclosed. The storage unit combining module includes a base, a circuit backboard and a signal adapter. The base has several positioning zones and an open zone. The circuit backboard includes a first section and a second section bent from each other. The circuit backboard further includes a plurality of connectors respectively disposed on the corresponding positioning zones. The signal adapter is disposed on the open zone and electrically connected to the second section. Two storage units are respectively loaded into two positioning zones on a right side of the base in a first inserting direction, and one storage unit is further loaded into a single positioning zone on a left side of the base in a second inserting direction.
    Type: Grant
    Filed: April 2, 2018
    Date of Patent: June 8, 2021
    Assignee: Wistron Corporation
    Inventors: Pei-Lin Huang, Kuen-Lin Lee, Yi-Shan Chen, Kuan-Hsun Lu