Abstract: A transceiver includes a RF modulator, a filter circuit, a control circuit and a first DC offset compensation circuit. During a first calibration period, the control circuit controls the filter circuit to be connected to the RF modulator with a first phase sequence, such that the RF modulator outputs a first radio frequency signal. During a second calibration period, the control circuit controls the filter circuit to be connected to the RF modulator with a second phase sequence, such that the RF modulator outputs a second radio frequency signal. The second phase sequence is inverted with the first phase sequence. The control circuit is further configured to calculate a first DC offset generated from the filter circuit, and to control the first DC offset compensation circuit to compensate the first DC offset generated from the filter circuit.

Abstract: An operational amplifier includes a differential amplifier circuit and a common mode feedback circuit. The differential amplifier circuit includes a bias circuit, an amplifier circuit, and a load circuit. The bias circuit generates a first operation voltage. The amplifier circuit receives a pair of input signals, and generates a pair of output signals according to the input signals and the first operation voltage. The load circuit is coupled to the amplifier circuit. The common mode feedback circuit generates at least one common mode feedback voltage based on a common mode voltage and a reference voltage. The common mode voltage is associated with the output signals. The at least one common mode feedback voltage is for controlling the bias circuit and the load circuit, to control a direct current (DC) voltage level of the differential amplifier circuit.

Abstract: A low dropout regulator includes an output circuit and an amplifier. The output circuit includes a signal input end configured to receive an input voltage and a signal output end configured to output an output voltage. The amplifier includes a first stage amplifier circuit, a second stage amplifier circuit, a first feedback circuit and a second feedback circuit. The first stage amplifier circuit includes a positive output end and a negative output end. The second stage amplifier circuit includes an input end and an output end, wherein the input end and the positive output end are coupled at a first node, and the output end is coupled to the output circuit. The first feedback circuit is coupled between the negative output end and the output end. The second feedback circuit is coupled between the first node and the output end.

Abstract: A dual-mode signal amplifying circuit includes: a first and a second input terminals for receiving differential input signals; two output terminals for providing differential output signals; a first through a third current sources; a first switch positioned between the first current source and a first node, and controlled by the first input terminal; a second switch positioned between the first current source and a second node, and controlled by the second input terminal; a third switch positioned between the first node and a fixed-voltage terminal, and controlled by a third node; a fourth switch positioned between the second node and a fixed-voltage terminal and controlled by the third node; a fifth switch positioned between the second current source and a fixed-voltage terminal, and controlled by the first node; and a sixth switch positioned between the third current source and a fixed-voltage terminal, and controlled by the second node.

Abstract: An operational amplifier includes a differential amplifier circuit and a common mode feedback circuit. The differential amplifier circuit includes a bias circuit, an amplifier circuit, and a load circuit. The bias circuit generates a first operation voltage. The amplifier circuit receives a pair of input signals, and generates a pair of output signals according to the input signals and the first operation voltage. The load circuit is coupled to the amplifier circuit. The common mode feedback circuit generates at least one common mode feedback voltage based on a common mode voltage and a reference voltage. The common mode voltage is associated with the output signals. The at least one common mode feedback voltage is for controlling the bias circuit and the load circuit, to control a direct current (DC) voltage level of the differential amplifier circuit.

Abstract: A dual-mode signal amplifying circuit includes: a first and a second input terminals for receiving differential input signals; two output terminals for providing differential output signals; a first through a third current sources; a first switch positioned between the first current source and a first node, and controlled by the first input terminal; a second switch positioned between the first current source and a second node, and controlled by the second input terminal; a third switch positioned between the first node and a fixed-voltage terminal, and controlled by a third node; a fourth switch positioned between the second node and a fixed-voltage terminal and controlled by the third node; a fifth switch positioned between the second current source and a fixed-voltage terminal, and controlled by the first node; and a sixth switch positioned between the third current source and a fixed-voltage terminal, and controlled by the second node.

Abstract: A dual-mode signal amplifying circuit includes: a first and a second input terminals for receiving differential input signals; two output terminals for providing differential output signals; a first through a third current sources; a first switch positioned between the first current source and a first node, and controlled by the first input terminal; a second switch positioned between the first current source and a second node, and controlled by the second input terminal; a third switch positioned between the first node and a fixed-voltage terminal, and controlled by a third node; a fourth switch positioned between the second node and a fixed-voltage terminal, and controlled by the third node; a fifth switch positioned between the second current source and a fixed-voltage terminal, and controlled by the first node; and a sixth switch positioned between the third current source and a fixed-voltage terminal, and controlled by the second node.

Abstract: A dual-mode signal amplifying circuit includes: a first and a second input terminals for receiving differential input signals; two output terminals for providing differential output signals; a first through a third current sources; a first switch positioned between the first current source and a first node, and controlled by the first input terminal; a second switch positioned between the first current source and a second node, and controlled by the second input terminal; a third switch positioned between the first node and a fixed-voltage terminal, and controlled by a third node; a fourth switch positioned between the second node and a fixed-voltage terminal, and controlled by the third node; a fifth switch positioned between the second current source and a fixed-voltage terminal, and controlled by the first node; and a sixth switch positioned between the third current source and a fixed-voltage terminal, and controlled by the second node.

Abstract: A DC offset calibration circuit for calibrating DC offset with multi-level method includes analog DC offset cancellation unit and digital DC offset cancellation unit, wherein analog DC offset cancellation unit includes first amplifier and integrator, first amplifier receives analog signal with DC offset, and transmits to integrator, and integrator transmits first feedback signal to first amplifier to output amplified signal with fixed DC offset, and digital DC offset cancellation unit includes comparator, digital circuit, digital-to-analog converter and second amplifier, where second amplifier receives amplified signal with fixed DC offset and transmits to comparator for determining DC offset value and transmitting to digital circuit, digital circuit generates logical result according to DC offset value and transmits to digital-to-analog converter, and therefore digital-to-analog converter accordingly generates second feedback signal to second amplifier, to calibrate DC offset value on second amplifier.

Abstract: A DC offset calibration circuit for calibrating DC offset with multi-level method includes analog DC offset cancellation unit and digital DC offset cancellation unit, wherein analog DC offset cancellation unit includes first amplifier and integrator, first amplifier receives analog signal with DC offset, and transmits to integrator, and integrator transmits first feedback signal to first amplifier to output amplified signal with fixed DC offset, and digital DC offset cancellation unit includes comparator, digital circuit, digital-to-analog converter and second amplifier, where second amplifier receives amplified signal with fixed DC offset and transmits to comparator for determining DC offset value and transmitting to digital circuit, digital circuit generates logical result according to DC offset value and transmits to digital-to-analog converter, and therefore digital-to-analog converter accordingly generates second feedback signal to second amplifier, to calibrate DC offset value on second amplifier.

Abstract: A power supplying circuit for generating an output voltage, which comprises: a noise detecting circuit, for receiving a first reference voltage and for generating a second reference voltage according to the output voltage and the first reference voltage, wherein a noise component of the second reference voltage is the same as which of the output voltage; a control voltage generating unit, for receiving a feedback voltage and the second reference voltage, and for generating a control voltage according to the feedback voltage and the second reference voltage; a voltage providing device, for generating the output voltage according to the control voltage and an input voltage; and a feedback module, for generating the feedback voltage according to the output voltage.

Abstract: The present invention relates to a receiving apparatus of a communication system, which comprises a receiving module, a selection unit, and a processing module. The receiving module receives an input signal and produces a first signal and a second signal. The phases of the first and the second signals are different. The selection unit receives the first and the second signals, and switches for outputting the first or the second signal. The processing module receives and processes the first and the second signals, and produces an output signal. Thereby, the present invention uses the selection unit for processing two phase signals via a set of channels. Thereby, circuit area and power consumption can be reduced, and hence achieving the purpose of saving cost.

Abstract: A communication device is disclosed, having a wireless LAN transceiver, a wireless LAN demodulation circuit, a Bluetooth transceiver, a Bluetooth demodulation circuit, an oscillator, and a mixer. The wireless LAN transceiver conducts communication in a first frequency band and the wireless LAN demodulation circuit demodulates the wireless LAN signals. The Bluetooth transceiver conducts communication in a second band and a third frequency band, which are higher and lower than the first frequency band, respectively. The oscillator generates oscillating signals. The mixer mixes the signals in the second frequency band with an oscillating signal, which is higher than the second frequency band, and mixes the signals in the third frequency band with another oscillating signal, which is lower than the third frequency band to generate mixed signals. The Bluetooth demodulation circuit demodulates the mixed signals of the mixer.

Abstract: A current-mode wireless receiver includes a pre-processor to receive a voltage-mode input signal and output a current-mode pre-processed signal corresponding to the voltage-mode input signal, a mixer to perform frequency down-conversion upon the current-mode pre-processed signal to generate a current-mode frequency down-converted signal, and an amplifier to amplify the current-mode frequency down-converted signal to generate a current-mode output signal. A method of wireless reception is also disclosed.

Abstract: A communication device is disclosed, having a wireless LAN transceiver, a wireless LAN demodulation circuit, a Bluetooth transceiver, a Bluetooth demodulation circuit, an oscillator, and a mixer. The wireless LAN transceiver conducts communication in a first frequency band and the wireless LAN demodulation circuit demodulates the wireless LAN signals. The Bluetooth transceiver conducts communication in a second band and a third frequency band, which are higher and lower than the first frequency band, respectively. The oscillator generates oscillating signals. The mixer mixes the signals in the second frequency band with an oscillating signal, which is higher than the second frequency band, and mixes the signals in the third frequency band with another oscillating signal, which is lower than the third frequency band to generate mixed signals. The Bluetooth demodulation circuit demodulates the mixed signals of the mixer.

Abstract: A power supplying circuit for generating an output voltage, which comprises: a noise detecting circuit, for receiving a first reference voltage and for generating a second reference voltage according to the output voltage and the first reference voltage, wherein a noise component of the second reference voltage is the same as which of the output voltage; a control voltage generating unit, for receiving a feedback voltage and the second reference voltage, and for generating a control voltage according to the feedback voltage and the second reference voltage; a voltage providing device, for generating the output voltage according to the control voltage and an input voltage; and a feedback module, for generating the feedback voltage according to the output voltage.

Abstract: The present invention relates to a receiving apparatus of a communication system, which comprises a receiving module, a selection unit, and a processing module. The receiving module receives an input signal and produces a first signal and a second signal. The phases of the first and the second signals are different. The selection unit receives the first and the second signals, and switches for outputting the first or the second signal. The processing module receives and processes the first and the second signals, and produces an output signal. Thereby, the present invention uses the selection unit for processing two phase signals via a set of channels. Thereby, circuit area and power consumption can be reduced, and hence achieving the purpose of saving cost.

Abstract: A current-mode wireless receiver includes a pre-processor to receive a voltage-mode input signal and output a current-mode pre-processed signal corresponding to the voltage-mode input signal, a mixer to perform frequency down-conversion upon the current-mode pre-processed signal to generate a current-mode frequency down-converted signal, and an amplifier to amplify the current-mode frequency down-converted signal to generate a current-mode output signal. A method of wireless reception is also disclosed.