Abstract: A microelectronic 3-dimensional solenoid of substantially circular or oval cross-section and a method for fabricating the solenoid. The solenoid is provided including a pre-processed semiconductor substrate, two supports upstanding from and spaced-apart on a top surface of the substrate, each support has a bottom end attached to the substrate. An inductor coil which has two spaced-apart ends each attached to one of two top ends of the two supports. The inductor coil is formed of a bi-layer metal laminate that has an inner metal layer and an outer metal layer. The outer metal layer is formed of a first metal that has a coefficient of thermal expansion larger than a coefficient of thermal expansion of a second metal that forms the inner metal layer.

Abstract: A microelectronic 3-dimensional solenoid of substantially circular or oval cross-section and a method for fabricating the solenoid. The solenoid is provided including a pre-processed semiconductor substrate, two supports upstanding from and spaced-apart on a top surface of the substrate, each support has a bottom end attached to the substrate. An inductor coil which has two spaced-apart ends each attached to one of two top ends of the two supports. The inductor coil is formed of a bi-layer metal laminate that has an inner metal layer and an outer metal layer. The outer metal layer is formed of a first metal that has a coefficient of thermal expansion larger than a coefficient of thermal expansion of a second metal that forms the inner metal layer.

Abstract: A method for fabricating a 3-dimensional solenoid utilizing a CMOS fabrication technology and a back end process without using photomasking is described. In the method, two suspended arms each formed of a bi-layered metal structure from metals that have different residual stress or coefficients of thermal expansion are utilized for connecting to an inductor coil formed of AlCu in-between the two arms. When the insulating layer of silicon dioxide is removed from the suspended arms, the free ends of the arms curve up and thus, raise the inductor coil away from the surface of the semiconductor substrate into a 3-dimensional structure.

Abstract: A method for determining the thermal resistance constant of a modular heat sink. The method can be carried out by first providing a heat capacity tank formed of a high thermal conductivity metal. A modular heat sink is then mounted on top of the heat capacity tank and heated together with the tank to a temperature of at least 40° C. The heating is then stopped and the heat sink/heat capacity tank is allowed to cool for at least 30 seconds before the temperature and the cooling time of the heat capacity tank is monitored and recorded. The function of dT/dt is then calculated. The amount of heat dissipated is then calculated from the equation of Q=W·Cp·(dT/dt), while the thermal resistance constant is calculated by the equation of R=(T−Tamb)/Q.

Abstract: A method for forming a cantilever beam probe card on a semiconducting substrate and the probe card fabricated by such method are described. The method utilizes the deposition of two separate metal layers of different metals for forming a cantilever beam and a microprobe for use as a probe needle. A sacrificial, insulating material layer such as oxide or nitride is utilized in-between the metal layers and a semiconducting substrate and is subsequently removed such that the cantilever beams are released from the semiconducting substrate except at a support portion. The present invention cantilever beam probe card formed by the method can be used to probe testing IC devices that have high pin count and fine pitch.

Abstract: A method for forming a cantilever beam probe card on a semiconducting substrate and the probe card fabricated by such method are described. The method utilizes the deposition of two separate metal layers of different metals for forming a cantilever beam and a microprobe for use as a probe needle. A sacrificial, insulating material layer such as oxide or nitride is utilized inbetween the metal layers and a semiconducting substrate and is subsequently removed such that the cantilever beams are released from the semiconducting substrate except at a support portion. The present invention cantilever beam probe card formed by the method can be used to probe testing IC devices that have high pin count and fine pitch.

Abstract: A method for fabricating a 3-dimensional solenoid utilizing a CMOS fabrication technology and a back end process without using photomasking is described. In the method, two suspended arms each formed of a bi-layered metal structure from metals that have different residual stress or coefficients of thermal expansion are utilized for connecting to an inductor coil formed of AlCu in-between the two arms. When the insulating layer of silicon dioxide is removed from the suspended arms, the free ends of the arms curve up and thus, raise the inductor coil away from the surface of the semiconductor substrate into a 3-dimensional structure.