Patents by Inventor Yi-Show Su

Yi-Show Su has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Tile-based routing method of a multi-layer circuit board and related structure
    Patent number: 7208403
    Abstract: A method for routing a plurality of signal traces out of a plurality of corresponding bumper pads for implementation of a die on a multi-layer circuit board includes utilizing the plurality of bumper pads positioned in a periphery area of the die; utilizing a plurality of power/ground bumper pads positioned in a center area of the die; assigning a plurality of signal traces corresponding to a plurality of bumper pads as a plurality of first-layer traces being routed in a first layer of the multi-layer circuit board; assigning a plurality of signal traces corresponding to a plurality of bumper pads as a plurality of second-layer traces being routed in a second layer of the multi-layer circuit board; routing the plurality of first-layer traces straight away from the die; and routing the plurality of second-layer traces with a turn not to be vertically underneath the first-layer traces.
    Type: Grant
    Filed: March 21, 2006
    Date of Patent: April 24, 2007
    Assignee: Silicon Integrated Systems Corp.
    Inventors: Chung-Yi Fang, Tze-Hsiang Chao, Yi-Show Su
  • TILE-BASED ROUTING METHOD OF A MULTI-LAYER CIRCUIT BOARD AND RELATED STRUCTURE
    Publication number: 20060154402
    Abstract: A method for routing a plurality of signal traces out of a plurality of corresponding bumper pads for implementation of a die on a multi-layer circuit board includes utilizing the plurality of bumper pads positioned in a periphery area of the die; utilizing a plurality of power/ground bumper pads positioned in a center area of the die; assigning a plurality of signal traces corresponding to a plurality of bumper pads as a plurality of first-layer traces being routed in a first layer of the multi-layer circuit board; assigning a plurality of signal traces corresponding to a plurality of bumper pads as a plurality of second-layer traces being routed in a second layer of the multi-layer circuit board; routing the plurality of first-layer traces straight away from the die; and routing the plurality of second-layer traces with a turn not to be vertically underneath the first-layer traces.
    Type: Application
    Filed: March 21, 2006
    Publication date: July 13, 2006
    Inventors: Chung-Yi Fang, Tze-Hsiang Chao, Yi-Show Su
  • Tile-based routing method of a multi-layer circuit board
    Patent number: 7043828
    Abstract: A routing method for routing a plurality of signal traces out of a plurality of corresponding bumper pads in a multi-layer circuit board. The multi-layer circuit board includes at least a first layer and a second layer. The method includes arranging the plurality of bumper pads based on a plurality of triangle units, routing a plurality of signal traces out of a plurality of corresponding bumper pads of in the first layer, routing a plurality of signal traces out of a plurality of corresponding bumper pads in the second layer not to be vertically parallel with the plurality of signal traces routed in the first layer, and arranging a plurality of shielding traces among the plurality of signal traces in the first layer and in the second layer.
    Type: Grant
    Filed: June 23, 2003
    Date of Patent: May 16, 2006
    Assignee: Silicon Integrated Systems Corp.
    Inventors: Chung-Yi Fang, Tze-Hsiang Chao, Yi-Show Su
  • TILE-BASED ROUTING METHOD OF A MULTI-LAYER CIRCUIT BOARD AND RELATED STRUCTURE
    Publication number: 20040255457
    Abstract: A routing method for routing a plurality of signal traces out of a plurality of corresponding bumper pads in a multi-layer circuit board. The multi-layer circuit board includes at least a first layer and a second layer. The method includes arranging the plurality of bumper pads based on a plurality of triangle units, routing a plurality of signal traces out of a plurality of corresponding bumper pads of in the first layer, routing a plurality of signal traces out of a plurality of corresponding bumper pads in the second layer not to be vertically parallel with the plurality of signal traces routed in the first layer, and arranging a plurality of shielding traces among the plurality of signal traces in the first layer and in the second layer.
    Type: Application
    Filed: June 23, 2003
    Publication date: December 23, 2004
    Inventors: Chung-Yi Fang, Tze-Hsiang Chao, Yi-Show Su