Abstract: A method for displaying an unread message according to some embodiments of the present disclosure includes identifying a first unread message of a first chat room in which a user using the computing device participates, and a second unread message of a second chat room in which the user participates, wherein the first chat room and the second chat room are different, and the first unread message and the second unread message are different and simultaneously displaying the first unread message and the second unread message on one screen in response to the user's selection input to a collect view button.

Abstract: Provided is a method for navigating thread-type messages performed by a user terminal. The method comprises extracting a plurality of core elements based on information collected from the thread-type messages in which a plurality of conversation messages are grouped, generating thumbnail configuration information on the thread-type messages using the plurality of core elements, and displaying a thumbnail view based on the thumbnail configuration information, the displaying being based on a user input for the thread-type message.

Abstract: A semiconductor device and a fabrication method thereof are provided. The semiconductor device includes a P type well region and an N type well region formed in a substrate, a gate insulating layer having a non-uniform thickness and formed on the P type well region and the N type well region, a gate electrode formed on the gate insulating layer, a P type well pick-up region formed in the P type well region, and a field relief oxide layer formed in the N type well region between the gate electrode and the drain region.

Abstract: A semiconductor device and a fabrication method thereof are provided. The semiconductor device includes a P type well region and an N type well region formed in a substrate, a gate insulating layer having a non-uniform thickness and formed on the P type well region and the N type well region, a gate electrode formed on the gate insulating layer, a P type well pick-up region formed in the P type well region, and a field relief oxide layer formed in the N type well region between the gate electrode and the drain region.

Abstract: A semiconductor device and a fabrication method thereof are provided. The semiconductor device includes a P type well region and an N type well region formed in a substrate, a gate insulating layer having a non-uniform thickness and formed on the P type well region and the N type well region, a gate electrode formed on the gate insulating layer, a P type well pick-up region formed in the P type well region, and a field relief oxide layer formed in the N type well region between the gate electrode and the drain region.

Abstract: A semiconductor device and a fabrication method thereof are provided. The semiconductor device includes a P type well region and an N type well region formed in a substrate, a gate insulating layer having a non-uniform thickness and formed on the P type well region and the N type well region, a gate electrode formed on the gate insulating layer, a P type well pick-up region formed in the P type well region, and a field relief oxide layer formed in the N type well region between the gate electrode and the drain region.

Abstract: A semiconductor integrated circuit including digital circuits and analog circuits integrated over a single substrate includes the substrate including portions where the digital circuits and the analog circuits are to be formed, and a plurality of deep-wells formed to a certain thickness inside the substrate to surround portions where devices of the digital circuits and devices of the analog circuits are to be formed to reduce interference between the devices of the analog circuits and the digital circuits.

Abstract: A semiconductor integrated circuit including digital circuits and analog circuits integrated over a single substrate includes the substrate including portions where the digital circuits and the analog circuits are to be formed, and a plurality of deep-wells formed to a certain thickness inside the substrate to surround portions where devices of the digital circuits and devices of the analog circuits are to be formed to reduce interference between the devices of the analog circuits and the digital circuits.

Abstract: The present invention discloses a method for manufacturing a resistor of a semiconductor device. In the manufacture of a resistor made of polysilicon, a polysilicon film of a fine grain structure is formed on the top of a semiconductor substrate at a temperature of more than 700° C., or a fine grain polysilicon film with heteronuclei produced therein is formed by depositing a polysilicon to a first height and purging the same and then depositing a polysilicon to a second height and purging the same. After doping the fine grain polysilicon film with a dopant and thermally treating the same, the polysilicon is patterned to form a resistor pattern. Accordingly, the resistor of this invention has an even distribution as the gradient in the dopant concentration becomes smaller by fine grains in the polysilicon film.

Abstract: Disclosed is a method for forming a MIM capacitor, the method comprising steps of: providing a semiconductor substrate formed with a base layer including a metallic pattern; depositing a first metallic layer to be used for a lower electrode on the base layer; depositing a first middle layer on the first metallic layer in order to improve the surface roughness of the first metallic layer and prevent oxidization thereof; depositing a dielectric layer with a high dielectric constant on the first middle layer; depositing a second middle layer on the dielectric layer in order to increase band gap energy; depositing a second metallic layer used for the upper electrode on the second middle layer; and completing the formation of the lower electrode by patterning the first metallic layer.

Abstract: The present invention discloses a method for manufacturing an MOS varactor which can be utilized as a high frequency device with an increased capacitance of the varactor part while maintaining the characteristics of a transistor by forming a gate oxide film of the MOS varactor by a high dielectric material as compared to a gate oxide film of the transistor.

Abstract: Disclosed is a method for forming an MIM capacitor of a semiconductor device, in which a lower electrode is utilized as a dielectric layer of a capacitor. The method comprises the steps of forming a via at a first insulating layer in order to expose a lower metal wire, forming a first barrier layer at a surface of the first insulating layer including the via, forming a metal layer on the first insulating layer in which the first barrier layer is formed, forming a capacitor lower electrode layer after forming a second barrier layer and a third barrier layer on the metal layer, forming a dielectric layer by oxidizing the capacitor lower electrode layer, forming a capacitor upper electrode layer on the dielectric layer, and patterning the capacitor upper electrode layer, the dielectric layer, and the capacitor lower electrode layer, thereby forming the capacitor.

Abstract: A method for forming an isolation region in a semiconductor device, in which nitrogen ions are injected into a region of an isolation oxide film to form an oxynitride film, thereby preventing formation of a recess at a top edge of the isolation oxide film, which improves the device isolation characteristic. The method includes depositing a pad oxide film and a pad nitride film over a substrate. The pad oxide film, the pad nitride film, and the substrate are selectively removed to form a trench, which is then filled with an isolation oxide film. Nitrogen ions are injected into an entire surface of the pad nitride film, inclusive of the isolation oxide film, to form an oxynitride film in a region of the isolation oxide film. The pad nitride film and the pad oxide film are removed, and a gate oxide film and a polysilicon layer are deposited.

Abstract: Disclosed is a method for forming a MIM capacitor, the method comprising steps of: providing a semiconductor substrate formed with a base layer including a metallic pattern; depositing a first metallic layer to be used for a lower electrode on the base layer; depositing a first middle layer on the first metallic layer in order to improve the surface roughness of the first metallic layer and prevent oxidization thereof; depositing a dielectric layer with a high dielectric constant on the first middle layer; depositing a second middle layer on the dielectric layer in order to increase band gap energy; depositing a second metallic layer used for the upper electrode on the second middle layer; and completing the formation of the lower electrode by patterning the first metallic layer.

Abstract: A method for forming an isolation region in a semiconductor device, in which nitrogen ions are injected into a region of an isolation oxide film to form an oxynitride film, thereby preventing formation of a recess at a top edge of the isolation oxide film, which improves the device isolation characteristic. The method includes depositing a pad oxide film and a pad nitride film over a substrate. The pad oxide film, the pad nitride film, and the substrate are selectively removed to form a trench, which is then filled with an isolation oxide film. Nitrogen ions are injected into an entire surface of the pad nitride film, inclusive of the isolation oxide film, to form an oxynitride film in a region of the isolation oxide film. The pad nitride film and the pad oxide film are removed, and a gate oxide film and a polysilicon layer are deposited.

Abstract: A method for forming an isolation region in a semiconductor device, in which nitrogen ions are injected into a region of an isolation oxide film to form an oxynitride film, thereby preventing formation of a recess at a top edge of the isolation oxide film, which improves the device isolation characteristic. The method includes depositing a pad oxide film and a pad nitride film over a substrate. The pad oxide film, the pad nitride film, and the substrate are selectively removed to form a trench, which is then filled with an isolation oxide film. Nitrogen ions are injected into an entire surface of the pad nitride film, inclusive of the isolation oxide film, to form an oxynitride film in a region of the isolation oxide film. The pad nitride film and the pad oxide film are removed, and a gate oxide film and a polysilicon layer are deposited.