Abstract: A magnetic tunnel junction (MTJ) device includes two magnetic tunnel junction elements and a magnetic shielding layer. The two magnetic tunnel junction elements are arranged side by side. The magnetic shielding layer is disposed between the magnetic tunnel junction elements. A method of forming said magnetic tunnel junction (MTJ) device includes the following steps. An interlayer including a magnetic shielding layer is formed. The interlayer is etched to form recesses in the interlayer. The magnetic tunnel junction elements fill in the recesses. Or, a method of forming said magnetic tunnel junction (MTJ) device includes the following steps. A magnetic tunnel junction layer is formed. The magnetic tunnel junction layer is patterned to form magnetic tunnel junction elements. An interlayer including a magnetic shielding layer is formed between the magnetic tunnel junction elements.

Abstract: The present disclosure provides a decoding device. The decoding device includes an iteration number computing unit and a recursive decoder. The iteration number computing unit receives multiple packet parameters corresponding to a packet and computes a codeword-number-per-symbol according to packet parameters, in which the packet includes multiple symbols. The iteration number computing unit computes an iteration number according to the codeword-number-per-symbol. The recursive decoder is coupled to the iteration number computing unit, and performs a decoding operation on a codeword within a data field of the packet according to the iteration number.

Abstract: A bandwidth detection device comprises a receiving circuit, for receiving a first plurality of frequency-domain signals on a first subchannel; a filter circuit, coupled to the receiving circuit, for transferring the first plurality of frequency-domain signals to a first plurality of filtered frequency-domain signals according to a filter function; and a processing circuit, coupled to the filter circuit, for comparing the first plurality of frequency-domain signals with the first plurality of filtered frequency-domain signals, to determine whether the first subchannel comprises first transmitted data.

Abstract: The present disclosure provides a decoding device. The decoding device includes an iteration number computing unit and a recursive decoder. The iteration number computing unit receives multiple packet parameters corresponding to a packet and computes a codeword-number-per-symbol according to packet parameters, in which the packet includes multiple symbols. The iteration number computing unit computes an iteration number according to the codeword-number-per-symbol. The recursive decoder is coupled to the iteration number computing unit, and performs a decoding operation on a codeword within a data field of the packet according to the iteration number.

Abstract: A bandwidth detection device comprises a receiving circuit, for receiving a first plurality of frequency-domain signals on a first subchannel; a filter circuit, coupled to the receiving circuit, for transferring the first plurality of frequency-domain signals to a first plurality of filtered frequency-domain signals according to a filter function; and a processing circuit, coupled to the filter circuit, for comparing the first plurality of frequency-domain signals with the first plurality of filtered frequency-domain signals, to determine whether the first subchannel comprises first transmitted data.

Abstract: The present disclosure includes an ML (Maximum Likelihood) detector. An embodiment of the ML detector comprises a search value selecting circuit and an ML detecting circuit. The search value selecting circuit is configured to select a search value according to a communication index and a modulation type or determine the search value according to a predetermined value, in which the communication index is related to a reception signal or a derivative thereof, the search value is associated with a search range, and a number of candidate signal value(s) in the search range is not greater than a number of all candidate signal values of the modulation type. The ML detecting circuit is configured to execute an ML calculation according to the search value and one of the reception signal and the derivative thereof, so as to calculate a log likelihood ratio of every candidate signal value in the search range.

Abstract: A receiving device comprises a signal detection unit, a reliability unit coupled to the signal detection unit and a decoding unit coupled to the signal detection unit and the reliability unit. The signal detection unit is for receiving a plurality of compensated symbols on a plurality of subcarriers, to generate a plurality of soft information and a plurality demodulated symbols of the plurality of compensated symbols according to the plurality of compensated symbols. The reliability unit is for generating a plurality of weights of the plurality of soft information according to a plurality of reliability information of the plurality of subcarriers. The decoding unit is for decoding the plurality of demodulated symbols according to the plurality of soft information and the plurality of weights, to generate a plurality of decoded bits.

Abstract: The present disclosure provides a demodulation method. The demodulation method includes obtaining a received signal; determining whether a multiuser interference is smaller than a threshold; performing a first signal detection operation on the received signal if the multiuser interference is smaller than the threshold, in which the first signal detection operation detects a single layer of spatial data in the received signal; and performing a second signal detection operation on the received signal if the multiuser interference is greater than the threshold, in which the second signal detection operation detects multiple layers of spatial data in the received signal.

Abstract: The present invention discloses an ML (Maximum Likelihood) detector comprising: a search value selecting circuit selecting a first-layer search value; and an ML detecting circuit.

Abstract: The present invention discloses an ML (Maximum Likelihood) detector. An embodiment of the ML detector comprises a search value selecting circuit and an ML detecting circuit. The search value selecting circuit is configured to select a first-layer search value. The ML detecting circuit is configured to carry out the following steps: selecting first-layer candidate values according to the first-layer search value, one of a reception signal and a derivative thereof, and one of a channel estimation signal and a derivative thereof, and adding one or more first-layer candidate value(s), if necessary; calculating second-layer candidate values according to all the above-mentioned first-layer candidate values, and adding one or more second-layer candidate value(s) and its/their corresponding first-layer candidate value(s), if necessary; and calculating log likelihood ratios according to the whole first-layer and second-layer candidate values.

Abstract: The present disclosure includes an ML (Maximum Likelihood) detector. An embodiment of the ML detector comprises a search value selecting circuit and an ML detecting circuit. The search value selecting circuit is configured to select a search value according to a communication index and a modulation type or determine the search value according to a predetermined value, in which the communication index is related to a reception signal or a derivative thereof, the search value is associated with a search range, and a number of candidate signal value(s) in the search range is not greater than a number of all candidate signal values of the modulation type. The ML detecting circuit is configured to execute an ML calculation according to the search value and one of the reception signal and the derivative thereof, so as to calculate a log likelihood ratio of every candidate signal value in the search range.

Abstract: The present invention discloses an ML (Maximum Likelihood) detector comprising: a search value selecting circuit selecting a first-layer search value; and an ML detecting circuit.

Abstract: The present invention discloses an ML (Maximum Likelihood) detector. An embodiment of the ML detector comprises a search value selecting circuit and an ML detecting circuit. The search value selecting circuit is configured to select a first-layer search value. The ML detecting circuit is configured to carry out the following steps: selecting first-layer candidate values according to the first-layer search value, one of a reception signal and a derivative thereof, and one of a channel estimation signal and a derivative thereof, and adding one or more first-layer candidate value(s), if necessary; calculating second-layer candidate values according to all the above-mentioned first-layer candidate values, and adding one or more second-layer candidate value(s) and its/their corresponding first-layer candidate value(s), if necessary; and calculating log likelihood ratios according to the whole first-layer and second-layer candidate values.

Abstract: A receiving device comprises a signal detection unit, a reliability unit coupled to the signal detection unit and a decoding unit coupled to the signal detection unit and the reliability unit. The signal detection unit is for receiving a plurality of compensated symbols on a plurality of subcarriers, to generate a plurality of soft information and a plurality demodulated symbols of the plurality of compensated symbols according to the plurality of compensated symbols. The reliability unit is for generating a plurality of weights of the plurality of soft information according to a plurality of reliability information of the plurality of subcarriers. The decoding unit is for decoding the plurality of demodulated symbols according to the plurality of soft information and the plurality of weights, to generate a plurality of decoded bits.