Patents by Inventor Yi-Te Lin

Yi-Te Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240128378
    Abstract: A semiconductor device includes a first transistor and a protection structure. The first transistor includes a gate electrode, a gate dielectric disposed on the gate electrode, and a channel layer disposed on the gate dielectric. The protection structure is laterally surrounding the gate electrode, the gate dielectric and the channel layer of the first transistor. The protection structure includes a first capping layer and a dielectric portion. The first capping layer is laterally surrounding and contacting the gate electrode, the gate dielectric and the channel layer of the first transistor. The dielectric portion is disposed on the first capping layer and laterally surrounding the first transistor.
    Type: Application
    Filed: January 30, 2023
    Publication date: April 18, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yi-Cheng Chu, Chien-Hua Huang, Yu-Ming Lin, Chung-Te Lin
  • Publication number: 20240113187
    Abstract: The present disclosure relates to an integrated chip. The integrated chip includes a substrate having one or more interior surfaces forming a recess within an upper surface of the substrate. Source/drain regions are disposed within the substrate on opposing sides of the recess. A first gate dielectric is arranged along the one or more interior surfaces forming the recess, and a second gate dielectric is arranged on the first gate dielectric and within the recess. A gate electrode is disposed on the second gate dielectric. The second gate dielectric includes one or more protrusions that extend outward from a recessed upper surface of the second gate dielectric and that are arranged along opposing sides of the second gate dielectric.
    Type: Application
    Filed: January 5, 2023
    Publication date: April 4, 2024
    Inventors: Jhu-Min Song, Ying-Chou Chen, Yi-Kai Ciou, Chien-Chih Chou, Fei-Yun Chen, Yu-Chang Jong, Chi-Te Lin
  • Publication number: 20240090230
    Abstract: A memory array and an operation method of the memory array are provided. The memory array includes first and second ferroelectric memory devices formed along a gate electrode, a channel layer and a ferroelectric layer between the gate electrode and the channel layer. The ferroelectric memory devices include: a common source/drain electrode and two respective source/drain electrodes, separately in contact with a side of the channel layer opposite to the ferroelectric layer, wherein the common source/drain electrode is disposed between the respective source/drain electrodes; and first and second auxiliary gates, capacitively coupled to the channel layer, wherein the first auxiliary gate is located between the common source/drain electrode and one of the respective source/drain electrodes, and the second auxiliary gate is located between the common source/drain electrode and the other respective source/drain electrode.
    Type: Application
    Filed: January 9, 2023
    Publication date: March 14, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wen-Ling Lu, Chen-Jun Wu, Ya-Yun Cheng, Sheng-Chih Lai, Yi-Ching Liu, Yu-Ming Lin, Feng-Cheng Yang, Chung-Te Lin
  • Patent number: 11929424
    Abstract: A method includes forming a semiconductor fin on a substrate; forming a dielectric layer over the semiconductor fin; forming a metal gate electrode in the dielectric layer and extending across the semiconductor fin; forming a source/drain regions on the semiconductor fin and on opposite sides of the metal gate electrode; performing a first non-zero bias plasma etching process to the metal gate electrode; after performing the first non-zero bias plasma etching process, performing a first zero bias plasma etching process to the metal gate electrode.
    Type: Grant
    Filed: July 26, 2022
    Date of Patent: March 12, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yi-Chen Lo, Li-Te Lin, Pinyen Lin
  • Publication number: 20150040463
    Abstract: A support device includes a body and a positioning device mounted on the body for coupling with a fishing reel. A longitudinal hole for receiving a fishing rod extends from a front end through a rear end of the body. A gripping portion is provided on the rear end and includes a coupling portion for coupling with the fishing reel. A finger of a user can grip the front section and can touch a surface section of the fishing rod via a lower opening in a front section of a lower side of the gripping portion. Another finger of the user can grip the rear section and can touch another surface section of the fishing rod via a lateral through-hole formed in a rear section of the lower side and extending from a left side through a right side of the body.
    Type: Application
    Filed: August 9, 2013
    Publication date: February 12, 2015
    Inventor: Yi-Te Lin
  • Patent number: 8176674
    Abstract: A roller assembly for a fishing rod roller guide includes a roller having two receiving portions each receiving a bearing. A side cover is mounted to each of two ends of the roller and includes an inner side having a lip received in a first annular groove in the end of the roller. Each lip includes a second annular groove aligned with a peripheral flange on one of the ends of the roller. A ring made of soft material is partially received in each second annular groove. A gap is formed between each ring and a peripheral flange on one of the ends of the roller. A spacing portion is formed between the inner side of each side cover and one of the ends of the roller. Grease is received in the gaps and seals a portion of each bearing aligned with an end edge of one of the receiving portions.
    Type: Grant
    Filed: September 20, 2009
    Date of Patent: May 15, 2012
    Inventor: Yi-Te Lin
  • Patent number: D647163
    Type: Grant
    Filed: March 20, 2011
    Date of Patent: October 18, 2011
    Inventor: Yi-Te Lin
  • Patent number: D668316
    Type: Grant
    Filed: March 16, 2012
    Date of Patent: October 2, 2012
    Inventor: Yi-Te Lin
  • Patent number: D672428
    Type: Grant
    Filed: June 4, 2012
    Date of Patent: December 11, 2012
    Inventor: Yi-Te Lin
  • Patent number: D672429
    Type: Grant
    Filed: June 4, 2012
    Date of Patent: December 11, 2012
    Inventor: Yi-Te Lin
  • Patent number: D699316
    Type: Grant
    Filed: March 28, 2013
    Date of Patent: February 11, 2014
    Inventor: Yi-Te Lin
  • Patent number: D714417
    Type: Grant
    Filed: February 26, 2014
    Date of Patent: September 30, 2014
    Inventor: Yi-Te Lin
  • Patent number: D715397
    Type: Grant
    Filed: February 26, 2014
    Date of Patent: October 14, 2014
    Inventor: Yi-Te Lin
  • Patent number: D721782
    Type: Grant
    Filed: June 12, 2014
    Date of Patent: January 27, 2015
    Inventor: Yi-Te Lin
  • Patent number: D767087
    Type: Grant
    Filed: May 12, 2015
    Date of Patent: September 20, 2016
    Inventor: Yi-Te Lin
  • Patent number: D767088
    Type: Grant
    Filed: May 12, 2015
    Date of Patent: September 20, 2016
    Inventor: Yi-Te Lin
  • Patent number: D767089
    Type: Grant
    Filed: May 12, 2015
    Date of Patent: September 20, 2016
    Inventor: Yi-Te Lin
  • Patent number: D810230
    Type: Grant
    Filed: September 10, 2016
    Date of Patent: February 13, 2018
    Inventor: Yi-Te Lin
  • Patent number: D898159
    Type: Grant
    Filed: August 2, 2019
    Date of Patent: October 6, 2020
    Inventor: Yi-Te Lin
  • Patent number: D912760
    Type: Grant
    Filed: October 24, 2019
    Date of Patent: March 9, 2021
    Inventor: Yi-Te Lin