Patents by Inventor Yi-Ti Wang

Yi-Ti Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7593264
    Abstract: Embodiments of addressing the programming disturb effect are shown. A medium voltage having a magnitude between the programming voltage and ground is applied to a metal bit line among the cells that are subject to the program disturb effect.
    Type: Grant
    Filed: September 14, 2006
    Date of Patent: September 22, 2009
    Assignee: Macronix International Co., Ltd.
    Inventors: Yi Te Shih, Jer-Hao Hsu, Yi-Ti Wang, Hsueh-Yi Lee
  • Patent number: 7323926
    Abstract: A charge pump circuit comprises a first pump stage, including a first sub-pump coupled to a first pre-charge MOSFET transistor, wherein the first sub-pump is used to pump down a gate of the first pre-charge MOSFET transistor to thereby increase the pre-charge efficiency of the first pre-charge MOSFET transistor. The higher efficiency the pre-charge MOSFET is, the lower the gate level of a pass transistor is. Thus, the charge sharing efficiency becomes better, and the body effect will be eliminated. The following pump stage is the same as the first pump stage. In addition, this pre-charging is implemented by PMOSFET only; therefore, only a single well is needed and then a small layout area can be achieved. Consequently, a high efficiency negative pump can be obtained.
    Type: Grant
    Filed: December 21, 2004
    Date of Patent: January 29, 2008
    Assignee: Macronix International Co., Ltd.
    Inventors: Kuan-Yeu Chen, Yi-Ti Wang
  • Publication number: 20070159887
    Abstract: Embodiments of addressing the programming disturb effect are shown. A medium voltage having a magnitude between the programming voltage and ground is applied to a metal bit line among the cells that are subject to the program disturb effect.
    Type: Application
    Filed: September 14, 2006
    Publication date: July 12, 2007
    Applicant: Macronix International Co., Ltd.
    Inventors: Yi Te Shih, Jer Hao Hsu, Yi-Ti Wang, Hsueh-Yi Lee
  • Publication number: 20060132219
    Abstract: In an embodiment, a charge pump circuit comprises a first pump stage, including a first sub-pump coupled to a first pre-charge MOSFET transistor, wherein the first sub-pump is used to pump down a gate of the first pre-charge MOSFET transistor to thereby increase the pre-charge efficiency of the first pre-charge MOSFET transistor. The higher efficiency the re-charge MOSFET is, the lower the gate level of pass transistor is. Thus, the charge sharing efficiency becomes better, and the body effect will be eliminated. The following pump stage is the same as the first pump stage. In addition, this embodiment is implemented by PMOSFET only; therefore, only single well is needed and then a small layout area can be achieved. Consequently, a high efficiency negative pump can be obtained.
    Type: Application
    Filed: December 21, 2004
    Publication date: June 22, 2006
    Inventors: Kuan-Yeu Chen, Yi-Ti Wang
  • Publication number: 20030184360
    Abstract: A charge pump for a flash memory. The charge pump includes: a current-guiding circuit having a first, a second, and a third output; and a first, a second, and a third charge unit. The current-guiding circuit has two diode-connected transistors respectively connected between the first and the second outputs, and the second and the third outputs. Each of the charge units, for storing charge, has two ends. The first, the second, and the third charge units respectively have one end connected to the first, the second, and the third outputs, and the other end of the third charge unit is connected to the first output.
    Type: Application
    Filed: December 12, 2002
    Publication date: October 2, 2003
    Inventors: Yi-Ti Wang, Wei-Wu Liao, Wen-Shih Shu