Patents by Inventor Yi-Ting Chen

Yi-Ting Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250117227
    Abstract: A method for adjusting application settings is provided. The method includes using an application setting module to receive at least one performance target from an application running on an electronic device. The method further includes using the application setting module to record at least one performance indicator of the application while the application is running, wherein the performance indicator corresponds to the performance target. The method further includes using the application setting module to estimate the estimated time that the temperature of the electronic device sustains less than the defense temperature. The method further includes using the application setting module to determine the score according to the performance indicator and the estimated time, wherein the score indicates to the application that it should raise, lower, or keep a current setting.
    Type: Application
    Filed: April 25, 2024
    Publication date: April 10, 2025
    Inventors: Ching-Yeh CHEN, Yi-Wei HO, Te-Hsin LIN, Shih-Ting HUANG, Chung Hao HO, Yu-Hsien LIN, Chiu-Jen LIN, Cheng-Che CHEN
  • Patent number: 12272397
    Abstract: A forming operation method of a resistive random access memory is provided. The method includes the following steps. A positive pulse and a negative pulse are sequentially applied, by a bit line/source line driver, to multiple resistive random access memory cells in a direction form a farthest location to a nearest location based on the bit line/source line driver through a bit line and a source line to break down a dielectric film of each of the resistive random access memory cells and generate a conductive filament of each of the resistive random access memory cells.
    Type: Grant
    Filed: March 9, 2023
    Date of Patent: April 8, 2025
    Assignee: United Microelectronics Corp.
    Inventors: Yi Ting Hung, Ko-Chi Chen, Tzu-Yun Chang
  • Patent number: 12272600
    Abstract: A method includes forming a dielectric layer over an epitaxial source/drain region. An opening is formed in the dielectric layer. The opening exposes a portion of the epitaxial source/drain region. A barrier layer is formed on a sidewall and a bottom of the opening. An oxidation process is performing on the sidewall and the bottom of the opening. The oxidation process transforms a portion of the barrier layer into an oxidized barrier layer and transforms a portion of the dielectric layer adjacent to the oxidized barrier layer into a liner layer. The oxidized barrier layer is removed. The opening is filled with a conductive material in a bottom-up manner. The conductive material is in physical contact with the liner layer.
    Type: Grant
    Filed: May 13, 2022
    Date of Patent: April 8, 2025
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Pin-Wen Chen, Chang-Ting Chung, Yi-Hsiang Chao, Yu-Ting Wen, Kai-Chieh Yang, Yu-Chen Ko, Peng-Hao Hsu, Ya-Yi Cheng, Min-Hsiu Hung, Chun-Hsien Huang, Wei-Jung Lin, Chih-Wei Chang, Ming-Hsing Tsai
  • Publication number: 20250113519
    Abstract: A method for forming a semiconductor device structure is provided. The method includes providing a substrate and a nanostructure stack. The method includes forming an isolation layer over the base and surrounding the fin. The method includes forming a first protection layer over the nanostructure stack and the isolation layer. The method includes forming a second protection layer over the first protection layer. The method includes forming a mask layer over the second protection layer. The top portion of the second protection layer protrudes from the mask layer. The method includes thinning the top portion of the second protection layer. The method includes removing the mask layer. The method includes removing the first protection layer and the second protection layer over the nanostructure stack. The method includes forming a gate stack wrapped around the nanostructure stack.
    Type: Application
    Filed: October 3, 2023
    Publication date: April 3, 2025
    Inventors: Kung-Pin CHANG, Yi-Ting LIN, Wen-Chiang HONG, Yao-Kwang WU, Jyh-Huei CHEN
  • Publication number: 20250102621
    Abstract: In a radar sensor, a transmitting antenna is configured to radiate a transmitted RF signal, a receiving antenna is configured to receive a reflected RF signal from a target, and a frontend circuit is configured to calculate the distance between the target and the radar sensor by measuring the frequency shift between the transmitted RF signal and the reflected RF signal. The frontend circuit includes a crystal-less signal synthesizer configured to generate the transmitted RF signal without using a crystal, and a mixer configured to provide an IF-band signal associated with the frequency shift between the transmitted RF signal and the reflected RF signal by mixing the reflected RF signal and the transmitted RF signal.
    Type: Application
    Filed: April 8, 2024
    Publication date: March 27, 2025
    Applicant: KaiKuTek INC.
    Inventors: Mike Chun-Hung Wang, Yi-Chu Chen, Tun-Yen Liao, Yi-Ting Tseng, Wei-Chi Li
  • Publication number: 20250087533
    Abstract: A method of forming a semiconductor device includes: forming a via in a first dielectric layer disposed over a substrate; forming a second dielectric layer over the first dielectric layer; forming an opening in the second dielectric layer, where the opening exposes an upper surface of the via; selectively forming a capping layer over the upper surface of the via, where the capping layer has a curved upper surface that extends above a first upper surface of the first dielectric layer distal from the substrate; after forming the capping layer, forming a barrier layer in the opening over the capping layer and along sidewalls of the second dielectric layer exposed by the opening; and filling the opening by forming an electrically conductive material over the barrier layer.
    Type: Application
    Filed: March 28, 2024
    Publication date: March 13, 2025
    Inventors: Ming-Hsing Tsai, Ya-Lien Lee, Chih-Han Tseng, Kuei-Wen Huang, Kuan-Hung Ho, Ming-Uei Hung, Chih-Cheng Kuo, Yi-An Lai, Wei-Ting Chen
  • Patent number: 12249649
    Abstract: A semiconductor device includes a fin-shaped structure on the substrate, a shallow trench isolation (STI) around the fin-shaped structure, a single diffusion break (SDB) structure in the fin-shaped structure for dividing the fin-shaped structure into a first portion and a second portion; a first gate structure on the fin-shaped structure, a second gate structure on the STI, and a third gate structure on the SDB structure. Preferably, a width of the third gate structure is greater than a width of the second gate structure and each of the first gate structure, the second gate structure, and the third gate structure includes a U-shaped high-k dielectric layer, a U-shaped work function metal layer, and a low-resistance metal layer.
    Type: Grant
    Filed: March 22, 2021
    Date of Patent: March 11, 2025
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Cheng-Han Wu, Hsin-Yu Chen, Chun-Hao Lin, Shou-Wei Hsieh, Chih-Ming Su, Yi-Ren Chen, Yuan-Ting Chuang
  • Publication number: 20250076245
    Abstract: A method and system for establishing a model for sensing ions in a solution, and a method and system for sensing ions in a solution apply an ion-sensitive field effect transistor in a machine learning model for ion detection in training solutions. The method for establishing a model includes adjusting environmental parameters, where the environmental parameters are selected from any one of multiple target temperatures or from any one of multiple external electric fields; establishing at least one virtual sensor based on the biasing relationship of the multi-gate ion sensitive field effect transistor; obtaining, by the at least one virtual sensor, multiple training features of the training solution based on the environmental parameters and bias parameters; and loading, by a computer, the environmental parameters and the training features into a machine learning model to establish an ion detection model, which is used to sense the types and concentrations of ions.
    Type: Application
    Filed: November 9, 2023
    Publication date: March 6, 2025
    Inventors: Chih-Ting Lin, Yi-Ting Wu, Sheng-Yu Chen, Wei-En Hsu
  • Publication number: 20250081650
    Abstract: A semiconductor device is provided. The semiconductor device includes a substrate, a first epitaxial layer over the substrate, a first photodiode and a second photodiode in the first epitaxial layer, and a trench isolation structure between the first photodiode and the second photodiode. The first photodiode includes a first doped region having a first conductivity type. The first photodiode includes a second doped region, overlying the first doped region, having a second conductivity type different than the first conductivity type. The first photodiode includes a third doped region, overlying the first doped region, having the second conductivity type. A first distance between a sidewall of the third doped region and an uppermost surface of the first epitaxial layer is between about a hundredth to about a fifth of a second distance between a sidewall of the trench isolation structure and the uppermost surface of the first epitaxial layer.
    Type: Application
    Filed: August 28, 2023
    Publication date: March 6, 2025
    Inventors: Wen-Sheng WANG, Yi-Hsuan Fan, Yen-Ting Chen
  • Patent number: 12243782
    Abstract: The present disclosure describes fabricating devices with tunable gate height and effective capacitance. A method includes forming a first metal gate stack in a dummy region of a semiconductor substrate and a second metal gate stack in an active device region of the semiconductor substrate, and performing a chemical mechanical polishing (CMP) process using a slurry including charged abrasive nanoparticles. The first and second metal gate stacks are different in composition. The charged abrasive nanoparticles include a first concentration in the active device region different from a second concentration in the dummy region.
    Type: Grant
    Filed: August 4, 2023
    Date of Patent: March 4, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING C0., LTD.
    Inventors: Ming-Chang Wen, Chang-Yun Chang, Keng-Yao Chen, Chen-Yu Tai, Yi-Ting Fu
  • Publication number: 20250072007
    Abstract: A MRAM layout structure with multiple unit cells, including a first word line, a second word line and a third word line extending through active areas, wherein two ends of a first MTJ are connected respectively to a second active area and one end of a second MTJ, and two ends of a third MTJ are connected respectively to a third active area and one end of a fourth MTJ, and a first bit line and a second bit line connected respectively to the other end of the second MTJ and the other end of the fourth MTJ.
    Type: Application
    Filed: November 13, 2024
    Publication date: February 27, 2025
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Yi-Ting Wu, Cheng-Tung Huang, Jen-Yu Wang, Yung-Ching Hsieh, Po-Chun Yang, Jian-Jhong Chen, Bo-Chang Li
  • Patent number: 12237394
    Abstract: A method for fabricating semiconductor device includes the steps of first providing a substrate having a first region and a second region, forming a first bottom barrier metal (BBM) layer on the first region and the second region, forming a first work function metal (WFM) layer on the first BBM layer on the first region and the second region, and then forming a diffusion barrier layer on the first WFM layer.
    Type: Grant
    Filed: July 26, 2023
    Date of Patent: February 25, 2025
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Yi-Fan Li, Wen-Yen Huang, Shih-Min Chou, Zhen Wu, Nien-Ting Ho, Chih-Chiang Wu, Ti-Bin Chen
  • Patent number: 12235615
    Abstract: A static auto-tuning system and method for controlling operation of a motor in a system. A speed reference signal is generated resulting in a speed response of the motor. Closed-loop feedback magnifies the rotating friction effect to an observable level. Inertia and rotating friction coefficient values of the system are estimated based on the speed frequency response and a virtual damping coefficient. A fixed low frequency speed signal may result in a first frequency response function for determining virtual damping, and a variable frequency excitation signal may result in a second frequency response function for determining the inertia and rotating friction characteristics. Closed-loop gains are determined based on these characteristics. The excitation signal may be sampled and a peak value in each interval may be identified and stored to produce an envelope of peak values for determining the gain response. Operation of the motor is controlled using the determined gains.
    Type: Grant
    Filed: October 14, 2022
    Date of Patent: February 25, 2025
    Inventors: Athanasios Sarigiannidis, Bo-Ting Lyu, Yi-Chieh Chen, Shih-Chin Yang
  • Publication number: 20250061005
    Abstract: A method for dynamic adaptive threading is provided. The method comprises receiving a query request for a recommended number of threads from an application. The method comprises determining the recommended number of threads according to a resource status of a system-on-a-chip (SoC) platform. The method comprises transmitting the recommended number of threads to the application.
    Type: Application
    Filed: August 15, 2024
    Publication date: February 20, 2025
    Inventors: Chung-Yang CHEN, Cheng-Che CHEN, Chung-Hao HO, Yi-Wei HO, Yen-Po CHIEN, Yen-Ting PAN
  • Publication number: 20250044605
    Abstract: An optical element driving mechanism is provided, which includes a movable assembly, a fixed portion, and a driving assembly. The movable assembly is used for connecting an optical element. The movable assembly is movable relative to the fixed portion. The driving assembly is used for driving the movable assembly to move relative to the fixed portion.
    Type: Application
    Filed: July 31, 2024
    Publication date: February 6, 2025
    Inventors: Kai-Po FAN, Man-Ting LU, Yi-Ho CHEN
  • Publication number: 20250044604
    Abstract: An optical element driving mechanism is provided, which includes a movable assembly, a fixed portion, a driving assembly, and a circuit assembly. The movable assembly is used for connecting an optical element. The movable assembly is movable relative to the fixed portion. The driving assembly is used for driving the movable assembly to move relative to the fixed portion. The circuit assembly connects the movable assembly and the fixed portion.
    Type: Application
    Filed: July 31, 2024
    Publication date: February 6, 2025
    Inventors: Kai-Po FAN, Man-Ting LU, Yi-Ho CHEN
  • Publication number: 20250044544
    Abstract: An optical element driving mechanism is provided, which includes a movable assembly, a fixed portion, a driving assembly, and an adhesive element. The movable assembly is used for connecting an optical element. The movable assembly is movable relative to the fixed portion. The fixed portion includes a case and a bottom. The driving assembly is used for driving the movable assembly to move relative to the fixed portion. The case is affixed on the bottom through the adhesive element.
    Type: Application
    Filed: July 31, 2024
    Publication date: February 6, 2025
    Inventors: Kai-Po FAN, Man-Ting LU, Yi-Ho CHEN
  • Publication number: 20250035890
    Abstract: An optical lens system includes six lens elements from an object side to an image side, the six lens elements are, in order from the object side to the image side, a first lens element, a second lens element, a third lens element, a fourth lens element, a fifth lens element and a sixth lens element. Each of the six lens elements has an object-side surface towards the object side and an image-side surface towards the image side. The image-side surface of the second lens element is concave in a paraxial region thereof. The third lens element has positive refractive power. The image-side surface of the fourth lens element is concave in a paraxial region thereof. The image-side surface of the sixth lens element includes at least one inflection point.
    Type: Application
    Filed: May 31, 2024
    Publication date: January 30, 2025
    Inventors: Kuan-Ting YEH, Shih-Han CHEN, Yi-Cheng LIN, Hsin-Hsuan HUANG, Yu-Han SHIH
  • Publication number: 20250037858
    Abstract: The present invention disclose a medical image-based system for predicting lesion classification and a method thereof. The system comprises a feature data extracting module for providing a raw feature data based on a medical image, and a predicting module for outputting a predicted class and a risk index according to the raw feature data. The predicting module comprises a classification unit for generating the predicted class and a prediction score corresponding thereto according to the raw feature data, and a risk evaluation unit for generating the risk index according to the prediction score. The system provides medical personnels a reference score and a risk index to determine progression of a certain disease.
    Type: Application
    Filed: February 1, 2024
    Publication date: January 30, 2025
    Inventors: YI-SHAN TSAI, YU-HSUAN LAI, CHENG-SHIH LAI, CHAO-YUN CHEN, MENG-JHEN WU, YI-CHUAN LIN, YI-TING CHIANG, PENG-HAO FANG, PO-TSUN KUO, YI-CHIH CHIU
  • Publication number: 20250036977
    Abstract: An electronic device is configured to execute instructions: compiling a first AI model and second AI model(s) to a first compiled file and second compiled file(s), respectively, wherein the first compiled file comprises a first data set and a first command set, and the second compiled file(s) comprises second data set(s) and second command set(s); generating light version file(s) for the AI model(s), wherein the light version file(s) comprises the second command set(s) and data patch(es); storing the first compiled file and the light version file(s) to a storage device; loading the first compiled file from the storage device to a memory; loading the light version file(s) from the storage device to the memory; generating the second data set(s) according to the first data set and the data patch(es); and executing the second AI model(s) according to the generated second data set(s) and the second command set(s) in the memory.
    Type: Application
    Filed: June 23, 2024
    Publication date: January 30, 2025
    Applicant: MEDIATEK INC.
    Inventors: Chia-Wei Hsu, Yu-Lung Lu, Yen-Ting Chiang, Chih-wei Chen, Yi-Cheng Lu, Jia-Sian Hong, Kuan-Yu Chen, Pei-Kuei Tsung, Hua Wu