Patents by Inventor Yi-Ting Chen

Yi-Ting Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250126933
    Abstract: A light emitting device including an epitaxial structure and a plurality of surface microstructures is provided. The epitaxial structure has a light emitting surface and a surrounding wall surface. The surrounding wall surface surrounds and is connected to the light emitting surface. The plurality of surface microstructures are separately arranged on the light emitting surface along a plurality of directions. The plurality of directions are not perpendicular to the surrounding wall surface. A light emitting device substrate including a plurality of the light emitting device is also provided.
    Type: Application
    Filed: November 13, 2023
    Publication date: April 17, 2025
    Applicant: PlayNitride Display Co., Ltd.
    Inventors: Yi-Min Su, Chung-Yu Chang, Yi-Ting Chen, Ching-Liang Lin
  • Patent number: 12183090
    Abstract: According to one aspect, intersection scenario description may be implemented by receiving a video stream of a surrounding environment of an ego-vehicle, extracting tracklets and appearance features associated with dynamic objects from the surrounding environment, extracting motion features associated with dynamic objects from the surrounding environment based on the corresponding tracklets, passing the appearance features through an appearance neural network to generate an appearance model, passing the motion features through a motion neural network to generate a motion model, passing the appearance model and the motion model through a fusion network to generate a fusion output, passing the fusion output through a classifier to generate a classifier output, and passing the classifier output through a loss function to generate a multi-label classification output associated with the ego-vehicle, dynamic objects, and corresponding motion paths.
    Type: Grant
    Filed: June 30, 2022
    Date of Patent: December 31, 2024
    Assignee: HONDA MOTOR CO., LTD.
    Inventors: Nakul Agarwal, Yi-Ting Chen
  • Publication number: 20240429317
    Abstract: A semiconductor device includes a semiconductor fin. The semiconductor device includes a first silicon oxide layer contacting the semiconductor fin at a first interface and including nitrogen at a first concentration. The semiconductor device includes a second silicon oxide layer contacting the first silicon oxide layer at a second interface and including nitrogen at a second concentration that is greater than the first concentration.
    Type: Application
    Filed: June 26, 2023
    Publication date: December 26, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hsiao Po-Kai, Cheng-Wei Chen, Yi-Ting Chen, Pei Tsang Ho, Wei-Yang Tseng
  • Publication number: 20240363752
    Abstract: A method and apparatus for minimizing silicon germanium facets in planar metal oxide semiconductor structures is disclosed. For example, a device fabricated according to the method may include a semiconductor substrate, a plurality of gate stacks formed on the substrate, a plurality of source/drain regions formed from silicon germanium, and a shallow trench isolation region positioned between two source/drain regions of the plurality of source/drain regions. Each source/drain region of the plurality of source/drain regions is positioned adjacent to at least one gate stack of the plurality of gate stacks. Moreover, the shallow trench isolation region forms a trench in the substrate without intersecting the two source/drain regions.
    Type: Application
    Filed: July 8, 2024
    Publication date: October 31, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yi-Sin WANG, Shan-Yun CHENG, Ching-Hung KAO, Jing-Jyu CHOU, Yi-Ting CHEN
  • Publication number: 20240330361
    Abstract: Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for training an image embedding model. In one aspect, a method comprises: obtaining training data comprising a plurality of training examples, wherein each training example comprises: an image pair comprising a first image and a second image; and selection data indicating one or more of: (i) a co-click rate of the image pair, and (ii) a similar-image click rate of the image pair; and using the training data to train an image embedding model having a plurality of image embedding model parameters.
    Type: Application
    Filed: June 12, 2024
    Publication date: October 3, 2024
    Inventors: Zhen Li, Yi-Ting Chen, Yaxi Gao, Da-Cheng Juan, Aleksei Timofeev, Chun-Ta Lu, Futang Peng, Sujith Ravi, Andrew Tomkins, Thomas J. Duerig
  • Publication number: 20240331592
    Abstract: A display apparatus and an image processing method thereof are provided. The display apparatus includes a display panel and an image processing device. The image processing device receives a low-resolution image from a host. The image processing device tracks a user's gaze to define a region of interest (ROI). The image processing device performs a video super-resolution (VSR) reconstruction on an original ROI image corresponding to the ROI in the low-resolution image to generate a high-definition ROI image. The image processing device pastes the high-definition ROI image back to the ROI in the low-resolution image to generate a processed image. The image processing device controls the display panel to display the processed image.
    Type: Application
    Filed: March 31, 2023
    Publication date: October 3, 2024
    Applicant: Novatek Microelectronics Corp.
    Inventors: Hung-Ming Wang, Sin-Hong Li, Yi-Ting Chen, Chih-Hung Kuo, Ting-Chou Tsai
  • Patent number: 12073563
    Abstract: Systems and methods for bird's eye view (BEV) segmentation are provided. In one embodiment, a method includes receiving an input image from an image sensor on an agent. The input image is a perspective space image defined relative to the position and viewing direction of the agent. The method includes extracting features from the input image. The method includes estimating a depth map that includes depth values for pixels of the plurality of pixels of the input image. The method includes generating a 3D point map including points corresponding to the pixels of the input image. The method includes generating a voxel grid by voxelizing the 3D point map into a plurality voxels. The method includes generating a feature map by extracting feature vectors for pixels based on the points included in the voxels of the plurality of voxels and generating a BEV segmentation based on the feature map.
    Type: Grant
    Filed: March 31, 2022
    Date of Patent: August 27, 2024
    Assignee: HONDA MOTOR CO., LTD.
    Inventors: Isht Dwivedi, Yi-Ting Chen, Behzad Dariush
  • Patent number: 12065139
    Abstract: A system and method for completing risk object identification that include receiving image data associated with a monocular image of a surrounding environment of an ego vehicle and analyzing the image data and completing semantic waypoint labeling of at least one region of the surrounding environment of the ego vehicle. The system and method also include completing counterfactual scenario augmentation with respect to the at least one region. The system and method further include determining at least one driver intention and at least one driver response associated with the at least one region.
    Type: Grant
    Filed: January 28, 2021
    Date of Patent: August 20, 2024
    Assignee: HONDA MOTOR CO., LTD.
    Inventors: Yi-Ting Chen, Zihao Xiao
  • Patent number: 12057504
    Abstract: A method and apparatus for minimizing silicon germanium facets in planar metal oxide semiconductor structures is disclosed. For example, a device fabricated according to the method may include a semiconductor substrate, a plurality of gate stacks formed on the substrate, a plurality of source/drain regions formed from silicon germanium, and a shallow trench isolation region positioned between two source/drain regions of the plurality of source/drain regions. Each source/drain region of the plurality of source/drain regions is positioned adjacent to at least one gate stack of the plurality of gate stacks. Moreover, the shallow trench isolation region forms a trench in the substrate without intersecting the two source/drain regions.
    Type: Grant
    Filed: May 23, 2022
    Date of Patent: August 6, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yi-Sin Wang, Shan-Yun Cheng, Ching-Hung Kao, Jing-Jyu Chou, Yi-Ting Chen
  • Publication number: 20240258304
    Abstract: A method for forming a semiconductor structure includes following operations. First fins are formed in a first region of a substrate, and second fins are formed in a second region of the substrate. Widths of the first fins are greater than widths of the second fins. An isolation structure is formed over the substrate. A first ion implantation is performed on the first fins. A portion of the isolation structure is removed to expose a portion of each first fin and a portion of each second fin. The widths of the first fins are equal to or less than the widths of the second fins after the removing of the portion of the isolation structure. A 3D capacitor is formed in the first region, and a FinFET device is formed in the second region. The 3D capacitor includes the first fins, and the FinFET device includes the second fins.
    Type: Application
    Filed: January 31, 2023
    Publication date: August 1, 2024
    Inventors: YI-TING CHEN, SUNG-HSIN YANG, CHEN-CHIEH CHIANG, JUNG-CHI JENG, LING-SUNG WANG
  • Patent number: 12038970
    Abstract: Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for training an image embedding model. In one aspect, a method comprises: obtaining training data comprising a plurality of training examples, wherein each training example comprises: an image pair comprising a first image and a second image; and selection data indicating one or more of: (i) a co-click rate of the image pair, and (ii) a similar-image click rate of the image pair; and using the training data to train an image embedding model having a plurality of image embedding model parameters.
    Type: Grant
    Filed: February 20, 2023
    Date of Patent: July 16, 2024
    Assignee: GOOGLE LLC
    Inventors: Zhen Li, Yi-Ting Chen, Yaxi Gao, Da-Cheng Juan, Aleksei Timofeev, Chun-Ta Lu, Futang Peng, Sujith Ravi, Andrew Tomkins, Thomas J. Duerig
  • Patent number: 12001246
    Abstract: A display control method applicable to an all-in-one (AIO) computer is provided. The AIO computer includes a first monitor and a second monitor. The display control method includes: receiving a control instruction from the first monitor; projecting a display content on the second monitor according to the control instruction; and selectively enabling a touch control function of the second monitor according to the control instruction.
    Type: Grant
    Filed: May 2, 2022
    Date of Patent: June 4, 2024
    Assignee: ASUSTEK COMPUTER INC.
    Inventors: Yuni Lai, Jen-Chiu Chiang, Meng-Ru He, Chung-Shang Chi, Jia-Jung Kuo, Hsueh-Chih Tang, Shu-Yun Chen, Chun-Yen Huang, Chi-Rong Hsu, Yi-Ting Chen
  • Publication number: 20240150592
    Abstract: Provided is a photocurable conductive black composition including: (a) at least one (meth)acrylate-functionalized urethane oligomer; (b) at least one photopolymerizable compound; (c) a photoinitiator; (d) a visible-light blocking system; (e) conductive fillers; and optionally (f) a thermal initiator. Also provided are a method for forming a cured product composed of the photocurable conductive black compositions, and an article comprising the cured product.
    Type: Application
    Filed: October 24, 2023
    Publication date: May 9, 2024
    Inventors: Chien-Ho HUANG, Yi-Ting CHEN, Tsung-Han TSAI, Li-Yen LIN
  • Patent number: 11947634
    Abstract: An image object classification method and system are disclosed. The method is executed by a processor coupled to a memory. The method includes: providing an image file including at least one image object, performing a process of extracting multiple binary-classified characteristics on the image object to obtain a plurality of first results independent of each other in categories, combining the plurality of first results in a manner of dimensionality reduction based on concatenation, performing a process of characteristics abstraction on the combined first results to obtain a second result, and performing a process of characteristics integration on the plurality of first results and the second result in a manner of dot product of matrices to obtain a classification result.
    Type: Grant
    Filed: September 1, 2021
    Date of Patent: April 2, 2024
    Assignee: Footprintku Inc.
    Inventors: Yan-Jhih Wang, Kuan-Hsiang Tseng, Jun-Qiang Wei, Shih-Feng Huang, Tzung-Pei Hong, Yi-Ting Chen
  • Publication number: 20240096498
    Abstract: A method for evaluating a risk of a subject getting a specific disease includes steps of: storing a reference database that contains original parameter sets; selecting target alleles from an SNP profile derived from genome sequencing data of a subject; selecting target parameter sets from among the original parameter sets; calculating, for each of the target parameter sets, a race factor based on a global risk allele frequency and a group-specific risk allele frequency included in the target parameter set; calculating a genetic factor based on statistics, global reference allele frequencies, the race factors for the target parameter sets, and numbers of chromosomes in homologous chromosome pairs included in the target parameter sets; calculating a citation factor based on numbers of citation times included in the target parameter sets; and calculating a risk score based on the genetic factor and the citation factor.
    Type: Application
    Filed: August 28, 2023
    Publication date: March 21, 2024
    Inventors: Yi-Ting CHEN, Sing-Han HUANG, Ching-Yung LIN, Xiang-Yu LIN, Cheng-Tang WANG, Raksha NANDANAHOSUR RAMESH, Pei-Hsin CHEN
  • Publication number: 20240077980
    Abstract: The present invention provides a transparent conductive substrate, sequentially comprising: a first resist layer, a first transparent conductive layer, a transparent core, a second transparent conductive layer, and a second resist layer; wherein the first resist layer is composed of a UV-light sensitive composition (C1); and the second resist layer is composed of a visible-light sensitive composition (C2). The present invention provides a double-side photolithographic method for manufacturing transparent conductive laminates. The transparent conductive laminates manufactured by the inventive method may be incorporated into touch panels.
    Type: Application
    Filed: August 23, 2023
    Publication date: March 7, 2024
    Inventor: YI-TING CHEN
  • Publication number: 20240078258
    Abstract: Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for jointly training an image embedding model and a text embedding model. In one aspect, a method comprises: processing data from a historical query log of a search system to generate a candidate set of training examples, wherein each training example comprises: (i) a search query comprising a sequence of one or more words, (ii) an image, and (iii) selection data characterizing how often users selected the image in response to the image being identified by a search result for the search query; selecting a plurality of training examples from the candidate set of training examples; and using the training data to jointly train the image embedding model and the text embedding model.
    Type: Application
    Filed: November 9, 2023
    Publication date: March 7, 2024
    Inventors: Zhen Li, Yi-ting Chen, Ning Ye, Yaxi Gao, Zijian Guo, Aleksei Timofeev, Futang Peng, Thomas J. Duerig
  • Publication number: 20240030920
    Abstract: A semiconductor device includes: first and second input circuits in a central region and correspondingly configured to operate in a first voltage domain; first and second single bit level shifters (SBLSs) correspondingly in first and second regions at first and second sides of the central region relative to a first direction and electrically coupled correspondingly to the first and second input circuits, and correspondingly configured to operate in a second voltage domain; and a control circuit configured to toggle each of the first and second SBLSs between a normal state and a standby state when a control signal is received from the control circuit.
    Type: Application
    Filed: October 2, 2023
    Publication date: January 25, 2024
    Inventors: Jing DING, Zhang-Ying YAN, Qingchao MENG, Yi-Ting CHEN
  • Patent number: 11880234
    Abstract: An electronic device includes a display surface, a back surface with a first portion and a second portion, and a support assembly. The support assembly includes a first, second, and third boards. The first board includes a first surface, detachably covering the first portion, and a second surface. The second board is bendably connected to the first board and combined with the second portion. The third board includes a pivoted end and a free end. The pivoted end is pivotally connected to the second surface and covers the second board and a portion of the first board. When the first board rotates relative to the first portion, the third board also rotates relative to the second board, the second surface faces the third board, and the second board simultaneously moves along the third board. Accordingly, the display surface is raised up a distance relative to the free end.
    Type: Grant
    Filed: January 26, 2022
    Date of Patent: January 23, 2024
    Assignee: ASUSTeK COMPUTER INC.
    Inventors: Chi-Rong Hsu, Yi-Ting Chen, Po-Nien Chen, Chi-Jung Tsai, Wei Hsiang Tang
  • Patent number: D1027937
    Type: Grant
    Filed: April 26, 2021
    Date of Patent: May 21, 2024
    Assignee: ASUSTeK COMPUTER INC.
    Inventors: Po-Nien Chen, Yi-Ting Chen