Patents by Inventor Yi-Ting Cheng

Yi-Ting Cheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11964881
    Abstract: A method for making iridium oxide nanoparticles includes dissolving an iridium salt to obtain a salt-containing solution, mixing a complexing agent with the salt-containing solution to obtain a blend solution, and adding an oxidating agent to the blend solution to obtain a product mixture. A molar ratio of a complexing compound of the complexing agent to the iridium salt is controlled in a predetermined range so as to permit the product mixture to include iridium oxide nanoparticles.
    Type: Grant
    Filed: July 27, 2020
    Date of Patent: April 23, 2024
    Assignee: NATIONAL YANG MING CHIAO TUNG UNIVERSITY
    Inventors: Pu-Wei Wu, Yi-Chieh Hsieh, Han-Yi Wang, Kuang-Chih Tso, Tzu-Ying Chan, Chung-Kai Chang, Chi-Shih Chen, Yu-Ting Cheng
  • Publication number: 20240064217
    Abstract: A timing control management method includes receiving a real-time protocol (RTP) packet by a jitter buffer management module, generating a playout delay range according to the RTP packet, transmitting the playout delay range to a reordering timer management module, generating a timer adjustment command from the reordering timer management module to a transport layer reordering function module, and adjusting a reordering timer according to the playout delay range by the transport layer reordering function module after the timer adjustment command is received by the transport layer reordering function module.
    Type: Application
    Filed: June 2, 2023
    Publication date: February 22, 2024
    Applicant: MEDIATEK INC.
    Inventors: Yi-Ting Cheng, Yu-Hao Hsieh
  • Publication number: 20240021698
    Abstract: A semiconductor device includes a substrate, a semiconductor fin, a silicon layer, a gate structure, gate spacers, and source/drain structures. The semiconductor fin is over the substrate. The silicon layer is over the semiconductor fin. The gate structure is over the silicon layer, in which the gate structure includes an interfacial layer over the silicon layer, a gate dielectric layer over the interfacial layer, and a gate electrode over the gate dielectric layer. The gate spacers are on opposite sidewalls of the gate structure and in contact with the interfacial layer of the gate structure, in which a bottom surface of the interfacial layer is higher than bottom surfaces of the gate spacers. The source/drain structures are on opposite sides of the gate structure.
    Type: Application
    Filed: July 14, 2023
    Publication date: January 18, 2024
    Applicants: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., NATIONAL TAIWAN UNIVERSITY
    Inventors: Hsien-Wen WAN, Yi-Ting CHENG, Ming-Hwei HONG, Juei-Nai KWO, Bo-Yu YANG, Yu-Jie HONG
  • Patent number: 11749738
    Abstract: A semiconductor device includes a substrate, a semiconductor fin, a silicon layer, a gate structure, gate spacers, and source/drain structures. The semiconductor fin is over the substrate. The silicon layer is over the semiconductor fin. The gate structure is over the silicon layer, in which the gate structure includes an interfacial layer over the silicon layer, a gate dielectric layer over the interfacial layer, and a gate electrode over the gate dielectric layer. The gate spacers are on opposite sidewalls of the gate structure and in contact with the interfacial layer of the gate structure, in which a bottom surface of the interfacial layer is higher than bottom surfaces of the gate spacers. The source/drain structures are on opposite sides of the gate structure.
    Type: Grant
    Filed: February 7, 2022
    Date of Patent: September 5, 2023
    Assignees: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., NATIONAL TAIWAN UNIVERSITY
    Inventors: Hsien-Wen Wan, Yi-Ting Cheng, Ming-Hwei Hong, Juei-Nai Kwo, Bo-Yu Yang, Yu-Jie Hong
  • Publication number: 20230073796
    Abstract: User equipment (UE) for managing out-of-order packets is provided. The UE may include a radio frequency (RF) signal processing device, a management module, a filter module and a multi-reorder queue circuit. The RF signal processing device may receive a plurality of packets from a network node. The management module may collect network information of the network node and application information and generate a plurality of filter rules according to the network information and the application information. The filter module may receive the filter rules from the management module and allocate a plurality of out-of-order packets of the packets to different reorder queues according to the filter rules, wherein each reorder queue corresponds to a different reorder timer. The multi-reorder queue circuit includes the reorder queues. The multi-reorder queue circuit determines how to push each out-of-order packet to its corresponding application through a TCP/IP stack.
    Type: Application
    Filed: November 1, 2021
    Publication date: March 9, 2023
    Inventors: Cunliang DU, Zhuoliang ZHANG, Yi-Ting CHENG, Na WANG
  • Publication number: 20230011006
    Abstract: A method includes forming a semiconductive channel layer on a substrate. A dummy gate is formed on the semiconductive channel layer. Gate spacers are formed on opposite sides of the dummy gate. The dummy gate is removed to form a gate trench between the gate spacers, resulting in the semiconductive channel layer exposed in the gate trench. A semiconductive protection layer is deposited in the gate trench and on the exposed semiconductive channel layer. A top portion of the semiconductive protection layer is oxidized to form an oxidation layer over a remaining portion of the semiconductive protection layer. The oxidation layer is annealed after the top portion of the semiconductive protection layer is oxidized. A gate structure is formed over the semiconductive protection layer and in the gate trench after the oxidation layer is annealed.
    Type: Application
    Filed: March 3, 2022
    Publication date: January 12, 2023
    Applicants: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., NATIONAL TAIWAN UNIVERSITY
    Inventors: Minghwei HONG, Juei-Nai KWO, Tun-Wen PI, Hsien-Wen WAN, Yi-Ting CHENG, Yu-Jie HONG
  • Publication number: 20220157965
    Abstract: A semiconductor device includes a substrate, a semiconductor fin, a silicon layer, a gate structure, gate spacers, and source/drain structures. The semiconductor fin is over the substrate. The silicon layer is over the semiconductor fin. The gate structure is over the silicon layer, in which the gate structure includes an interfacial layer over the silicon layer, a gate dielectric layer over the interfacial layer, and a gate electrode over the gate dielectric layer. The gate spacers are on opposite sidewalls of the gate structure and in contact with the interfacial layer of the gate structure, in which a bottom surface of the interfacial layer is higher than bottom surfaces of the gate spacers. The source/drain structures are on opposite sides of the gate structure.
    Type: Application
    Filed: February 7, 2022
    Publication date: May 19, 2022
    Applicants: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., NATIONAL TAIWAN UNIVERSITY
    Inventors: Hsien-Wen WAN, Yi-Ting CHENG, Ming-Hwei HONG, Juei-Nai KWO, Bo-Yu YANG, Yu-Jie HONG
  • Patent number: 11245023
    Abstract: A semiconductor device includes a semiconductive channel region, a semiconductive protection layer, a gate structure, and a pair of gate spacers. The semiconductive protection layer is on and in contact with the channel. The gate structure is above the semiconductive protection layer and includes gate dielectric layer and a gate electrode. The gate dielectric layer is above the semiconductive protection layer. The gate electrode is above the gate dielectric layer. The gate spacers are on opposite sides of the gate structure. The semiconductive protection layer extends from an inner sidewall of a first one of the pair of gate spacers to an inner sidewall of a second one of the pair of gate spacers.
    Type: Grant
    Filed: July 31, 2020
    Date of Patent: February 8, 2022
    Assignees: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., NATIONAL TAIWAN UNIVERSITY
    Inventors: Hsien-Wen Wan, Yi-Ting Cheng, Ming-Hwei Hong, Juei-Nai Kwo, Bo-Yu Yang, Yu-Jie Hong
  • Publication number: 20220037505
    Abstract: A semiconductor device includes a semiconductive channel region, a semiconductive protection layer, a gate structure, and a pair of gate spacers. The semiconductive protection layer is on and in contact with the channel. The gate structure is above the semiconductive protection layer and includes gate dielectric layer and a gate electrode. The gate dielectric layer is above the semiconductive protection layer. The gate electrode is above the gate dielectric layer. The gate spacers are on opposite sides of the gate structure. The semiconductive protection layer extends from an inner sidewall of a first one of the pair of gate spacers to an inner sidewall of a second one of the pair of gate spacers.
    Type: Application
    Filed: July 31, 2020
    Publication date: February 3, 2022
    Applicants: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., NATIONAL TAIWAN UNIVERSITY
    Inventors: Hsien-Wen WAN, Yi-Ting CHENG, Ming-Hwei HONG, Juei-Nai KWO, Bo-Yu YANG, Yu-Jie HONG
  • Publication number: 20180152941
    Abstract: A communications apparatus includes a radio transceiver and a processor. The radio transceiver transmits or receives wireless radio frequency signals to communicate with a first network device. The processor estimates a period for the first network device to transmit a timing advance (TA) command according to a plurality of previously received TA commands, determines an arrival time of a forthcoming TA command according to the estimated period, determines whether to skip a chance to receive the forthcoming TA command at the arrival time according to the estimated period and a TA timer interval, and does not use the radio transceiver to receive the forthcoming TA command at the arrival time when determining to skip the chance to receive the forthcoming TA command.
    Type: Application
    Filed: November 30, 2016
    Publication date: May 31, 2018
    Inventors: Yi-Ting CHENG, Yen-Ku LIU
  • Patent number: 9865516
    Abstract: A wafer and a forming method thereof are provided. The wafer has a die region and a scribe-line region adjacent to the die region, and includes a conductive bonding pad in the die region of the wafer and a wafer acceptance test (WAT) pad in the scribe-line region of the wafer. A top surface of the WAT pad is lower than a top surface of the conductive bonding pad.
    Type: Grant
    Filed: January 10, 2016
    Date of Patent: January 9, 2018
    Assignee: Micron Technology, Inc.
    Inventors: Tzung-Han Lee, Chun-Yi Wu, Sheng-Yu Yan, Yi-Ting Cheng
  • Publication number: 20170347325
    Abstract: The wireless communication methods and devices are provided. The wireless communication method includes the steps of determining whether uplink data for an uplink transmission includes control messages; and forbidding a Tx power throttling procedure from being performed when the uplink data includes the control messages. When the uplink data does not include the control message the transmission power throttling procedure is performed.
    Type: Application
    Filed: May 31, 2016
    Publication date: November 30, 2017
    Inventors: Meng-Shiang LIN, Yi-Ting CHENG
  • Publication number: 20170200661
    Abstract: A wafer and a forming method thereof are provided. The wafer has a die region and a scribe-line region adjacent to the die region, and includes a conductive bonding pad in the die region of the wafer and a wafer acceptance test (WAT) pad in the scribe-line region of the wafer. A top surface of the WAT pad is lower than a top surface of the conductive bonding pad.
    Type: Application
    Filed: January 10, 2016
    Publication date: July 13, 2017
    Inventors: Tzung-Han LEE, Chun-Yi WU, Sheng-Yu YAN, Yi-Ting CHENG
  • Patent number: 9648491
    Abstract: A method of selecting an active SIM from multiple SIMs and a wireless device utilizing the same are disclosed. The method includes: acquiring SIM information associated with each SIM under a dynamic environment, wherein each SIM provides for the PS data service; calculating a SIM score of each SIM based on the acquired SIM information associated with each SIM; and selecting the active SIM based on all SIM scores to provide for the PS data service. The SIM information includes RSSI, RSCP, Ec/N0, CQI, and data speed on each SIM in the dynamic environment.
    Type: Grant
    Filed: February 19, 2014
    Date of Patent: May 9, 2017
    Assignee: MEDIATEK INC.
    Inventors: Yu-Ting Chen, Yi-Ting Cheng, Pei-Shiuan Ho, Hsiao-Yun Tseng
  • Patent number: 9313709
    Abstract: An embodiment of a method for call management, performed by a processing unit of a UE (user equipment), is disclosed. The method is employed in a hardware configuration of at least two subscriber identity cards sharing a radio resource. A PS (packet-switched) service is first provided for the first subscriber identity card. Packet data transmission and reception is handed over to a second PS service with the second subscriber identity card from the first PS service after receiving a call request requesting a CS (circuit-switched) service with the second subscriber identity card.
    Type: Grant
    Filed: November 15, 2013
    Date of Patent: April 12, 2016
    Assignee: MEDIATEK INC.
    Inventors: Yi-Ting Cheng, Pei-Shiuan Ho, Yu-Ting Chen, Keng-Ming Huang
  • Publication number: 20150365216
    Abstract: A wireless communication method for performing a packet-switched (PS) data service in a mobile communications device with a plurality of subscriber identity modules (SIM) is provided. A PS service is first performed with a first subscriber identity module. During performing the PS service with the first subscriber identity module, it is then determined packet loss status regarding whether a packet in the downlink transmission have been successfully received. A frequency for receiving signals on control channel or circuit-switched channel associated with the first subscriber identity module or signals on control channel or circuit-switched channel or packet-switched channel associated with a second subscriber identity module is adaptively adjusted according to the determination result while performing the PS service with the first subscriber identity module.
    Type: Application
    Filed: June 13, 2014
    Publication date: December 17, 2015
    Inventors: Peng-An CHEN, Yi-Ting CHENG
  • Publication number: 20150237497
    Abstract: A method of selecting an active SIM from multiple SIMs and a wireless device utilizing the same are disclosed. The method includes: acquiring SIM information associated with each SIM under a dynamic environment, wherein each SIM provides for the PS data service; calculating a SIM score of each SIM based on the acquired SIM information associated with each SIM; and selecting the active SIM based on all SIM scores to provide for the PS data service. The SIM information includes RSSI, RSCP, Ec/N0, CQI, and data speed on each SIM in the dynamic environment.
    Type: Application
    Filed: February 19, 2014
    Publication date: August 20, 2015
    Applicant: Media Tek Inc.
    Inventors: Yu-Ting CHEN, Yi-Ting CHENG, Pei-Shiuan HO, Hsiao-Yun TSENG
  • Publication number: 20150139181
    Abstract: An embodiment of a method for call management, performed by a processing unit of a UE (user equipment), is disclosed. The method is employed in a hardware configuration of at least two subscriber identity cards sharing a radio resource. A PS (packet-switched) service is first provided for the first subscriber identity card. Packet data transmission and reception is handed over to a second PS service with the second subscriber identity card from the first PS service after receiving a call request requesting a CS (circuit-switched) service with the second subscriber identity card.
    Type: Application
    Filed: November 15, 2013
    Publication date: May 21, 2015
    Applicant: MediaTek Inc.
    Inventors: Yi-Ting Cheng, Pei-Shiuan Ho, Yu-Ting Chen, Keng-Ming Huang
  • Patent number: 8802557
    Abstract: A method for forming a micro bump includes forming a first nano-particle layer on a substrate and forming a second nano-particle layer on the first nano-particle layer. The first and second nano-particle layers include a plurality of first nano particles and a plurality of second nano particles, respectively. The method further includes irradiating a laser beam onto the second nano-particle layer, where the laser beam penetrates through the second nano-particle layer and is at least partially absorbed by at least some of the first nano particles to generate heat. The first nano particles and the second nano particles have different absorption rates with respect to the laser beam.
    Type: Grant
    Filed: March 27, 2013
    Date of Patent: August 12, 2014
    Assignee: Industrial Technology Research Institute
    Inventors: Ruoh-Huey Uang, Yi-Ting Cheng
  • Patent number: 8665729
    Abstract: A method for performing radio link control (RLC) with round trip time (RTT) awareness is provided, where the method is applied to an electronic device. The method includes: dynamically estimating an index according to one or more factors; and based upon the index, dynamically adjusting a status prohibit timer value of a status prohibit timer for performing RLC. For example, the index can be an RTT of transmission/retransmission, and the step of dynamically estimating the index may further include: dynamically estimating the RTT of transmission/retransmission by detecting a time period between a first time point and a second time point, wherein the first time point represents time of sending a negative acknowledgement (NACK) status report. In another example, the index can be an RTT awareness index, where the method may include estimating the RTT awareness index according to at least one predetermined estimation function. An associated apparatus is also provided.
    Type: Grant
    Filed: February 20, 2012
    Date of Patent: March 4, 2014
    Assignee: Mediatek Inc.
    Inventors: Yi-Ting Cheng, Peng-An Chen