Patents by Inventor Yi Tong CHIU

Yi Tong CHIU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor device packages and methods of manufacturing the same
    Patent number: 11114370
    Abstract: A semiconductor device package includes a substrate, a redistribution structure, a conductive pad, a conductive element, and a conductive via. The redistribution structure is disposed over the substrate and includes a first dielectric layer and a first conductive layer. The conductive pad is disposed on a first surface of the first dielectric layer. The conductive element is disposed in the first dielectric layer and is electrically connected to the conductive pad. The conductive via extends from the conductive pad toward the substrate through the conductive element and the first dielectric layer. The first conductive layer is separated from the conductive via.
    Type: Grant
    Filed: November 5, 2019
    Date of Patent: September 7, 2021
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Shun-Tsat Tu, Hong-Jyun Lin, Yi Tong Chiu, Yi Chun Wu
  • SEMICONDUCTOR DEVICE PACKAGES AND METHODS OF MANUFACTURING THE SAME
    Publication number: 20210134712
    Abstract: A semiconductor device package includes a substrate, a redistribution structure, a conductive pad, a conductive element, and a conductive via. The redistribution structure is disposed over the substrate and includes a first dielectric layer and a first conductive layer. The conductive pad is disposed on a first surface of the first dielectric layer. The conductive element is disposed in the first dielectric layer and is electrically connected to the conductive pad. The conductive via extends from the conductive pad toward the substrate through the conductive element and the first dielectric layer. The first conductive layer is separated from the conductive via.
    Type: Application
    Filed: November 5, 2019
    Publication date: May 6, 2021
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Shun-Tsat TU, Hong-Jyun LIN, Yi Tong CHIU, Yi Chun WU