Patents by Inventor Yi Tseng
Yi Tseng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250147400Abstract: A double-sided display device includes a transparent self-luminous display panel, a switching panel and a projection device. The transparent self-luminous display panel has a light-emitting side and a backside opposite to the light-emitting side. The switching panel is disposed on the backside of the transparent self-luminous display panel. The switching panel includes a first electrode, a second electrode and a liquid crystal layer disposed between the first electrode and the second electrode. The first electrode and the second electrode are configured to control liquid crystal molecules in the liquid crystal layer so that the switching panel includes a scattering state and a transparent state. The projection device is configured to project toward the light-emitting side of the transparent self-luminous display panel.Type: ApplicationFiled: December 21, 2023Publication date: May 8, 2025Applicant: AUO CorporationInventors: Heng Yi Tseng, Kun-Cheng Tien, Chih-Kang Wu
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Patent number: 12253707Abstract: A backlight module includes a light guide element including first optical microstructures and second optical microstructures. An angle value of an angle of the first optical microstructures is V1. When the second optical microstructures are respectively recessed into or protrude from a bottom surface, a projection of each sub-optical microstructure on a reference plane has a peak point closest or to farthest from a light emitting surface and a first valley point and a second valley point farthest from or closest to the light emitting surface, a height difference between the peak point and the first valley point or the second valley point is ?H, a length difference between the peak point and the first valley point or the second valley point is ?L, and tan?1(?H/?L) is V2, where V2>0 and V2?0.5·V1.Type: GrantFiled: March 13, 2023Date of Patent: March 18, 2025Assignee: Coretronic CorporationInventors: Ying-Hsiang Chen, Cheng-Yi Tseng, Chung-Yang Fang, Ping-Yen Chen
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Patent number: 12248173Abstract: Disclosed is an optical module, including a lower housing, an upper housing covering the lower housing, a circuit board, a first metal base, a second metal base, a silicon photonic chip, and a light emission module including a laser chip and an optical path assembly. The first metal base is disposed on one side of the upper housing. The second metal base is disposed on one side of the lower housing. The circuit board with a hollow region is disposed on the second metal base. The silicon photonic chip is disposed on the second metal base exposed from the hollow region. The laser chip is disposed on the first metal base. The optical path assembly is disposed on the first metal base and/or on the second metal base exposed from the hollow region, and guides a third optical signal emitted by the laser chip to the silicon photonic chip.Type: GrantFiled: December 22, 2022Date of Patent: March 11, 2025Assignee: DONGGUAN LUXSHARE TECHNOLOGIES CO., LTDInventors: Chung-Hsin Fu, Min-Sheng Kao, ChunFu Wu, Yi-Tseng Lin, Chih-Wei Yu, Chien-Tzu Wu, QianBing Yan, Yueh-Kuo Lin
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Patent number: 12217716Abstract: A method for driving a cholesteric liquid crystal display, wherein the method includes steps as follows: Firstly, a reflective cholesteric liquid crystal panel including a pixel array composed of a plurality of pixel units is provided. Next, a scanning operation is performed on the pixel array. The scanning operation includes steps as follows: A continuous fixed pulse is applied to at least one of the plurality of pixel units lasting for a time period, so as to make a cholesterol liquid crystal layer of the at least one of the plurality of pixel units having a uniform lying helix (ULH) phase; and a maintaining pulse that is smaller than the continuous fixed pulse is applied to the at least one of the plurality of pixel units.Type: GrantFiled: March 14, 2024Date of Patent: February 4, 2025Assignee: AUO CORPORATIONInventors: Heng-Yi Tseng, Yi-Han Tseng, Yi-Jyun Ke, Kun-Cheng Tien
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Publication number: 20250022940Abstract: The present disclosure describes forming a semiconductor structure having an isolation layer surrounding a portion of a gate structure. The semiconductor structure includes a channel structure on a substrate, a first isolation layer on the substrate and surrounding the channel structure, and a gate structure on the channel structure and the first isolation layer. The gate structure includes a first portion having a first width and a second portion having a second width less than the first width. The semiconductor structure further includes a second isolation layer on the first isolation layer and surrounding the first portion of the gate structure.Type: ApplicationFiled: July 11, 2023Publication date: January 16, 2025Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Che-Chun LU, Yi-Hsing CHU, Chia-Yi TSENG
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Publication number: 20250023642Abstract: Disclosed are a co-packaged integrated optoelectronic module and a co-packaged optoelectronic switch chip. The co-packaged integrated optoelectronic module includes a carrier board, and an optoelectronic submodule, a slave microprocessor and a master microprocessor disposed on and electrically connected to the carrier board. In the optoelectronic submodule, a digital signal processing chip converts an electrical analog signal into an electrical digital signal, an optoelectronic signal analog conversion chip converts an optical analog signal into the electrical analog signal to the digital signal processing chip, and an optical transceiver chip receives and transmits the optical analog signal to the optoelectronic signal analog conversion chip. The slave microprocessor monitors operation of the optoelectronic submodule.Type: ApplicationFiled: September 25, 2024Publication date: January 16, 2025Applicant: Dongguan Luxshare Technologies Co., LtdInventors: Min-Sheng KAO, ChunFu WU, Chung-Hsin FU, QianBing YAN, LinChun LI, Chih-Wei YU, Chien-Tzu WU, Yi-Tseng LIN
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Publication number: 20240429304Abstract: A dummy gate structure is formed over a plurality of active regions. The dummy gate structure extends in a first horizontal direction in a planar top view. The active regions each extend in a second horizontal direction in the planar top view. The second horizontal direction is different from the first horizontal direction. A plurality of source/drain components is formed over the active regions. A dielectric structure is formed over the source/drain components. The dummy gate structure is then removed. A removal of the dummy gate structure exposes a first segment of each of the active regions. A thickness of the first segment of each of the active regions is reduced in the first horizontal direction.Type: ApplicationFiled: June 24, 2023Publication date: December 26, 2024Inventors: Che-Chun Lu, Guan-Lun Chen, Yi-Hsing Chu, Chia-Yi Tseng
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Publication number: 20240429285Abstract: The present disclosure describes forming a semiconductor structure having an isolation layer surrounding a sloped portion of a channel structure. The semiconductor structure includes a channel structure having first, second, and third portions on a substrate. The first portion has a first width. The second portion has a second width less than the first width. The third portion has a third width less than the second width. The semiconductor structure further includes a first isolation layer on the substrate and surrounding the first portion, a second isolation layer on the first isolation layer and surrounding the second portion of the channel structure, and a gate structure on the second isolation layer and surrounding the third portion of the channel structure.Type: ApplicationFiled: June 22, 2023Publication date: December 26, 2024Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Che-Chun LU, Yi-Hsing CHU, Chia-Yi TSENG
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Publication number: 20240421228Abstract: Noise semiconductor devices and methods of forming the same are provided. A semiconductor device according to the present disclosure includes a substrate, a fin structure over the substrate and extending lengthwise along a direction, the fin structure including a middle section sandwiched between a first end section and a second section along the direction, a gate structure wrapping over a channel region of the middle section, and a first source/drain feature and a second source/drain feature sandwiching the channel region of the middle section along the direction, The middle section includes a first semiconductor material and the first end section and the second end section include a second semiconductor material different from the first semiconductor material.Type: ApplicationFiled: June 14, 2023Publication date: December 19, 2024Inventors: Che-Chun Lu, Yi-Hsing Chu, Chia-Yi Tseng
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Publication number: 20240400700Abstract: The present invention relates to tools and methods for the generation of antibodies which specifically bind chemokine receptors, such as CC or CXC chemokine receptors. Provided are isolated sulfated polypeptides and conjugates thereof, which can be used for example as antigens or for off target panning to facilitate the generation of anti-human, anti-cynomolgus, and/or anti-mouse chemokine receptor antibodies, e.g. for the generation of antibodies with fully human CDRs and/or other favorable properties for therapeutic use. The present invention furthermore relates to antibodies and conjugates thereof which can be obtained by applying the aforementioned tools and methods. Provided are antibodies specifically binding to human, cynomolgus and/or murine CCR8 with favorable properties for therapeutic use, such as cross-reactive antibodies, fully human antibodies, low internalizing (including non-internalizing) antibodies, and antibodies efficiently inducing ADCC and/or ADCP in Treg cells.Type: ApplicationFiled: May 16, 2024Publication date: December 5, 2024Applicant: Bayer AktiengesellschaftInventors: Sandra Berndt, Christian Bertling, Pascale Buchmann, Philipp Ellinger, Katharina Filarsky, Matyas Gorjanacz, Sabine Maria Hoff, Nikolaus Pawlowski, Helge Roider, Beatrix Stelte-Ludwig, Mark Trautwein, Ernst Weber, Uwe Gritzan, Oliver von Ahsen, Christian Votsmeier, Wiebke Maria Nadler, Patrick Jones, Pedro Paz, Su-Yi Tseng, Phaik Lyn Oh
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Publication number: 20240376218Abstract: The present invention relates to tools and methods for the generation of antibodies which specifically bind chemokine receptors, such as CC or CXC chemokine receptors. Provided are isolated sulfated polypeptides and conjugates thereof, which can be used for example as antigens or for off target panning to facilitate the generation of anti-human, anti-cynomolgus, and/or anti-mouse chemokine receptor antibodies, e.g. for the generation of antibodies with fully human CDRs and/or other favorable properties for therapeutic use. The present invention furthermore relates to antibodies and conjugates thereof which can be obtained by applying the aforementioned tools and methods. Provided are antibodies specifically binding to human, cynomolgus and/or murine CCR8 with favorable properties for therapeutic use, such as cross-reactive antibodies, fully human antibodies, low internalizing (including non-internalizing) antibodies, and antibodies efficiently inducing ADCC and/or ADCP in Treg cells.Type: ApplicationFiled: May 16, 2024Publication date: November 14, 2024Applicant: Bayer AktiengesellschaftInventors: Sandra Berndt, Christian Bertling, Pascale Buchmann, Philipp Ellinger, Katharina Filarsky, Matyas Gorjanacz, Sabine Maria Hoff, Nikolaus Pawlowski, Helge Roider, Beatrix Stelte-Ludwig, Mark Trautwein, Ernst Weber, Uwe Gritzan, Oliver von Ahsen, Christian Votsmeier, Wiebke Maria Nadler, Patrick Jones, Pedro Paz, Su-Yi Tseng, Phaik Lyn Oh
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Patent number: 12136952Abstract: Disclosed are a co-packaged integrated optoelectronic module and a co-packaged optoelectronic switch chip. The co-packaged integrated optoelectronic module includes a carrier board, and an optoelectronic submodule, a slave microprocessor and a master microprocessor disposed on and electrically connected to the carrier board. In the optoelectronic submodule, a digital signal processing chip converts an electrical analog signal into an electrical digital signal, an optoelectronic signal analog conversion chip converts an optical analog signal into the electrical analog signal to the digital signal processing chip, and an optical transceiver chip receives and transmits the optical analog signal to the optoelectronic signal analog conversion chip. The slave microprocessor monitors operation of the optoelectronic submodule.Type: GrantFiled: August 10, 2022Date of Patent: November 5, 2024Assignee: DONGGUAN LUXSHARE TECHNOLOGIES CO., LTDInventors: Min-Sheng Kao, ChunFu Wu, Chung-Hsin Fu, QianBing Yan, LinChun Li, Chih-Wei Yu, Chien-Tzu Wu, Yi-Tseng Lin
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Publication number: 20240309582Abstract: The present invention provides a synthetic leather including at least a substrate (i), an adhesive layer (ii), and a skin layer (iii), in which the adhesive layer (ii) and the skin layer (iii) are formed from respective specific urethane resin compositions. The adhesive layer (ii) is formed from a urethane resin composition including an anionic urethane resin (X) and water (Y). The skin layer (iii) is formed from a urethane resin composition including an anionic urethane resin (S) and water (T), in which the anionic urethane resin (S) is produced using, for example, a polycarbonate polyol (A-1) produced using biomass-derived decanediol.Type: ApplicationFiled: September 9, 2021Publication date: September 19, 2024Applicant: DIC CorporationInventors: Ya-Yi Tseng, Ryo Maeda
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Patent number: 12092882Abstract: An optical electrical connector includes a casing, a printed circuit board, an electronic chip, a photoelectric conversion component, and a heat sink device. The casing includes an electrical port and an optical port. A receiving space is defined between the electrical port and the optical port. The printed circuit board extends longitudinally along a first direction. The printed circuit board includes a main body portion located in the receiving space and a front end portion exposed in the electrical port. The electronic chip, the photoelectric conversion component and the heat sink device are all accommodated in the receiving space. The electronic chip and the photoelectric conversion component are not only disposed on the printed circuit board, but also electrically connected to the printed circuit board. The heat sink device is disposed on the casing and faces the electronic chip for conducting the heat accumulated on the electronic chip.Type: GrantFiled: July 6, 2022Date of Patent: September 17, 2024Assignee: DONGGUAN LUXSHARE TECHNOLOGIES CO., LTDInventors: Yi-Tseng Lin, Chih-Wei Yu, Chien-Tzu Wu, Kuen-Da Jeng, Min-Sheng Kao
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Patent number: 12065497Abstract: The present invention relates to tools and methods for the generation of antibodies which specifically bind chemokine receptors, such as CC or CXC chemokine receptors. Provided are isolated sulfated polypeptides and conjugates thereof, which can be used for example as antigens or for off target panning to facilitate the generation of anti-human, anti-cynomolgus, and/or anti-mouse chemokine receptor antibodies, e.g. for the generation of antibodies with fully human CDRs and/or other favorable properties for therapeutic use. The present invention furthermore relates to antibodies and conjugates thereof which can be obtained by applying the aforementioned tools and methods. Provided are antibodies specifically binding to human, cynomolgus and/or murine CCR8 with favorable properties for therapeutic use, such as cross-reactive antibodies, fully human antibodies, low internalizing (including non-internalizing) antibodies, and antibodies efficiently inducing ADCC and/or ADCP in Treg cells.Type: GrantFiled: April 22, 2022Date of Patent: August 20, 2024Assignee: Bayer AktiengesellschaftInventors: Sandra Berndt, Christian Bertling, Pascale Buchmann, Philipp Ellinger, Katharina Filarsky, Matyas Gorjanacz, Sabine Hoff, Nikolaus Pawlowski, Helge Roider, Beatrix Stelte-Ludwig, Mark Trautwein, Ernst Weber, Uwe Gritzan, Oliver von Ahsen, Christian Votsmeier, Wiebke Maria Nadler, Patrick Jones, Pedro Paz, Su-Yi Tseng, Phaik Lyn Oh
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Publication number: 20240251225Abstract: A machine learning model may be trained using annotated communications data. Each communication (e.g., a short messaging system (SMS) message or email) is annotated with a measure of user interaction. The machine learning model is thus trained to predict a measure of user interaction for future communications. Before sending future communications, at least a portion of the communication is provided to the trained machine learning model to predict the expected measure of user interaction with the communication. In response to the prediction, the sender of the communication may alter the communication. The system may automatically send the communication if the predicted measure of user interaction exceeds a predetermined threshold and only prompt the user if the predicted measure of user interaction does not exceed the predetermined threshold.Type: ApplicationFiled: April 4, 2024Publication date: July 25, 2024Inventors: Ankit Jaini, Ivan Senilov, Jordan Earnest, Claire Electra Longo, Jiahui Cai, Chiung-Yi Tseng
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Publication number: 20240210639Abstract: Disclosed is an optical emission assembly including a heat dissipation base, an adapter, a light-emitting assembly, a multiplexer, a cooling chip, a converging lens, a housing, and a heat-conducting glue. The heat dissipation base includes a first heat dissipation plate and a second heat dissipation plate forming a T-shaped or an L-shaped structure. The light-emitting assembly and the multiplexer are disposed on the second heat dissipation plate. The multiplexer combines light beams emitted by light-emitting chips of the light-emitting assembly into one light beam, and then the one light beam enters the adapter through the converging lens. The cooling chip is disposed on the first heat dissipation plate. The heat dissipation base and the cooling chip are disposed in the housing, and the cooling chip corresponds to a through hole of the housing. The heat-conducting glue is filled in the through hole and between the cooling chip and the housing.Type: ApplicationFiled: June 2, 2023Publication date: June 27, 2024Applicants: DONGGUAN XUNTAO ELECTRONIC CO., LTD., Dongguan Luxshare Technologies Co., LtdInventors: Chung-Hsin FU, Min-Sheng KAO, Yi-Tseng LIN, Chih-Wei YU
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Publication number: 20240210635Abstract: Disclosed is an optical emission assembly including a body, an adapter, two light-emitting assemblies, a multiplexer and a converging lens. The body is provided with a first positioning groove, a second positioning groove, an accommodation groove, and a through hole. The accommodation groove communicates with the first and second positioning grooves and the through hole. A groove bottom of the first positioning groove communicates with a groove bottom of the second positioning groove. The adapter is connected to the body and disposed corresponding to the through hole. When the two light-emitting assemblies are installed in the first and second positioning grooves, each light-emitting chip of each light-emitting assembly emits beams towards the accommodation groove to make the multiplexer disposed at the bottom of the accommodation groove combine the beams into one beam. The converging lens is disposed in the through hole to converge the one beam on the adapter.Type: ApplicationFiled: June 2, 2023Publication date: June 27, 2024Applicants: DONGGUAN XUNTAO ELECTRONIC CO., LTD., Dongguan Luxshare Technologies Co., LtdInventors: Chung-Hsin FU, Min-Sheng KAO, Yi-Tseng LIN, Chih-Wei YU
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Publication number: 20240192549Abstract: An intelligent window includes two substrates and a dimming layer. Each substrate is electrically connected to a voltage source. A switchable electric field is formed between the two substrates. The dimming layer is formed by filling a liquid crystal material between the two substrates. The liquid crystal material is formed by mixing a chiral molecule, a dichroic dye, and a salt ion in a nematic liquid crystal. A weight percentage concentration of the chiral molecule in the liquid crystal material is determined according to a limitation formula (I). C is the weight percentage concentration, n is a birefringence index of the liquid crystal material, p is a chiral force of the chiral molecule in micrometer?1, D is a thickness of the dimming layer in micrometer, m1 is a constant of multiaxial absorption condition in micrometer, and m2 is a constant of normally transparent condition.Type: ApplicationFiled: October 22, 2021Publication date: June 13, 2024Inventors: TSUNG-HSIEN LIN, CHENG-CHANG LI, HENG-YI TSENG, HUNG-CHANG JAU, LI-MIN CHANG, KUAN-WU LIN
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Patent number: 12009302Abstract: A method includes following steps. An image of a wafer is captured. A first contact region in the captured image at which the first conductive contact is rendered is identified. A second contact region in the captured image at which the second conductive contact is rendered is identified. The second conductive contact is determined as not shorted to the first conductive contact, in response to the identified second contact region in the captured image is darker than the identified first contact region in the captured image.Type: GrantFiled: July 26, 2022Date of Patent: June 11, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Yen-Hsung Ho, Chia-Yi Tseng, Chih-Hsun Lin, Kun-Tsang Chuang, Yung-Lung Hsu