Patents by Inventor Yi Tsung Tsai

Yi Tsung Tsai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11967613
    Abstract: A semiconductor structure includes a substrate, and an active device and a passive device over the substrate. The active device is disposed in a first region of the substrate, and the passive device is disposed in a second region of the substrate. The semiconductor structure further includes a shielding structure and a passivation layer. The shielding structure includes a barrier layer and a ceiling layer. The barrier layer is on the passive device and the active device, and the ceiling layer is on the barrier layer. The passivation layer is under the barrier layer and covers a top surface of the passive device. An air cavity is defined by sidewalls of the barrier layer, a bottom surface of the ceiling layer, and the substrate.
    Type: Grant
    Filed: May 16, 2023
    Date of Patent: April 23, 2024
    Assignee: WIN SEMICONDUCTORS CORP.
    Inventors: Ju-Hsien Lin, Jung-Tao Chung, Shu-Hsiao Tsai, Hsi-Tsung Lin, Chen-An Hsieh, Yi-Han Chen, Yao-Ting Shao
  • Patent number: 11705495
    Abstract: Provided is a memory device including a plurality of stack structures disposed on a substrate; and a dielectric layer. Each stack structure includes a first conductive layer, a second conductive layer, an inter-gate dielectric layer, a metal silicide layer, and a barrier layer. The second conductive layer is disposed on the first conductive layer. The inter-gate dielectric layer is disposed between the first and second conductive layers. The metal silicide layer is disposed on the second conductive layer. The barrier layer is disposed between the metal silicide layer and the second conductive layer. The dielectric layer laterally surrounds a lower portion of the plurality of stack structures to expose a portion of the metal silicide layer of the plurality of stack structures.
    Type: Grant
    Filed: May 20, 2021
    Date of Patent: July 18, 2023
    Assignee: Winbond Electronics Corp.
    Inventors: Yi-Tsung Tsai, Chih-Hao Lin
  • Patent number: 11652004
    Abstract: A memory device and a method for forming the same are provided. The method includes forming a plurality of gate structures on a substrate, forming a first spacer on opposite sides of the gate structures, filling a dielectric layer between adjacent first spacers, forming a metal silicide layer on the gate structures, conformally forming a spacer material layer over the metal silicide layer, the first spacer layer and the dielectric layer, and performing an etch back process on the spacer material layer to form a second spacer on opposite sides of the metal silicide layer.
    Type: Grant
    Filed: December 20, 2021
    Date of Patent: May 16, 2023
    Assignee: WINBOND ELECTRONICS CORP.
    Inventors: Yi-Tsung Tsai, Chia-Wei Wu, Chih-Hao Lin, Chien-Chih Li
  • Publication number: 20220115518
    Abstract: A memory device and a method for forming the same are provided. The method includes forming a plurality of gate structures on a substrate, forming a first spacer on opposite sides of the gate structures, filling a dielectric layer between adjacent first spacers, forming a metal silicide layer on the gate structures, conformally forming a spacer material layer over the metal silicide layer, the first spacer layer and the dielectric layer, and performing an etch back process on the spacer material layer to form a second spacer on opposite sides of the metal silicide layer.
    Type: Application
    Filed: December 20, 2021
    Publication date: April 14, 2022
    Inventors: Yi-Tsung TSAI, Chia-Wei WU, Chih-Hao LIN, Chien-Chih LI
  • Publication number: 20220093763
    Abstract: Provided is a memory device including a plurality of stack structures disposed on a substrate; and a dielectric layer. Each stack structure includes a first conductive layer, a second conductive layer, an inter-gate dielectric layer, a metal silicide layer, and a barrier layer. The second conductive layer is disposed on the first conductive layer. The inter-gate dielectric layer is disposed between the first and second conductive layers. The metal silicide layer is disposed on the second conductive layer. The barrier layer is disposed between the metal silicide layer and the second conductive layer. The dielectric layer laterally surrounds a lower portion of the plurality of stack structures to expose a portion of the metal silicide layer of the plurality of stack structures.
    Type: Application
    Filed: May 20, 2021
    Publication date: March 24, 2022
    Applicant: Winbond Electronics Corp.
    Inventors: Yi-Tsung Tsai, Chih-Hao Lin
  • Patent number: 11245026
    Abstract: A memory device and a method for forming the same are provided. The method includes forming a plurality of gate structures on a substrate, forming a first spacer on opposite sides of the gate structures, filling a dielectric layer between adjacent first spacers, forming a metal silicide layer on the gate structures, conformally forming a spacer material layer over the metal silicide layer, the first spacer layer and the dielectric layer, and performing an etch back process on the spacer material layer to form a second spacer on opposite sides of the metal silicide layer.
    Type: Grant
    Filed: November 22, 2019
    Date of Patent: February 8, 2022
    Assignee: WINBOND ELECTRONICS CORP.
    Inventors: Yi-Tsung Tsai, Chia-Wei Wu, Chih-Hao Lin, Chien-Chih Li
  • Publication number: 20210159235
    Abstract: A memory device and a method for forming the same are provided. The method includes forming a plurality of gate structures on a substrate, forming a first spacer on opposite sides of the gate structures, filling a dielectric layer between adjacent first spacers, forming a metal silicide layer on the gate structures, conformally forming a spacer material layer over the metal silicide layer, the first spacer layer and the dielectric layer, and performing an etch back process on the spacer material layer to form a second spacer on opposite sides of the metal silicide layer.
    Type: Application
    Filed: November 22, 2019
    Publication date: May 27, 2021
    Inventors: Yi-Tsung TSAI, Chia-Wei WU, Chih-Hao LIN, Chien-Chih LI
  • Patent number: 10529726
    Abstract: A manufacturing method of a memory structure including the following steps is provided. A memory cell structure is formed on a substrate. The memory cell structure has a first side and a second side opposite to each other. A protective layer structure covering the memory cell structure is formed. The material of the protective layer structure is nitride. The protective layer structure is a continuous structure. The height of the protective layer structure adjacent to the second side of the memory cell structure is greater than the height of the protective layer structure adjacent to the first side of the memory cell structure.
    Type: Grant
    Filed: August 2, 2019
    Date of Patent: January 7, 2020
    Assignee: Winbond Electronics Corp.
    Inventors: Yi-Tsung Tsai, Yu-Chun Yang, Fang-Wei Lin, Hsin-Li Kuo
  • Publication number: 20190355732
    Abstract: A manufacturing method of a memory structure including the following steps is provided. A memory cell structure is formed on a substrate. The memory cell structure has a first side and a second side opposite to each other. A protective layer structure covering the memory cell structure is formed. The material of the protective layer structure is nitride. The protective layer structure is a continuous structure. The height of the protective layer structure adjacent to the second side of the memory cell structure is greater than the height of the protective layer structure adjacent to the first side of the memory cell structure.
    Type: Application
    Filed: August 2, 2019
    Publication date: November 21, 2019
    Applicant: Winbond Electronics Corp.
    Inventors: Yi-Tsung Tsai, Yu-Chun Yang, Fang-Wei Lin, Hsin-Li Kuo
  • Patent number: 10438957
    Abstract: A memory structure including a substrate, a memory cell structure, and a protective layer structure is provided. The memory cell structure is disposed on the substrate and has a first side and a second side opposite to each other. The protective layer structure covers the memory cell structure. The material of the protective layer structure is nitride. The protective layer structure is a continuous structure. The height of the protective layer structure adjacent to the second side of the memory cell structure is greater than the height of the protective layer structure adjacent to the first side of the memory cell structure.
    Type: Grant
    Filed: August 15, 2017
    Date of Patent: October 8, 2019
    Assignee: Winbond Electronics Corp.
    Inventors: Yi-Tsung Tsai, Yu-Chun Yang, Fang-Wei Lin, Hsin-Li Kuo
  • Publication number: 20190013322
    Abstract: A memory structure including a substrate, a memory cell structure, and a protective layer structure is provided. The memory cell structure is disposed on the substrate and has a first side and a second side opposite to each other. The protective layer structure covers the memory cell structure. The material of the protective layer structure is nitride. The protective layer structure is a continuous structure. The height of the protective layer structure adjacent to the second side of the memory cell structure is greater than the height of the protective layer structure adjacent to the first side of the memory cell structure.
    Type: Application
    Filed: August 15, 2017
    Publication date: January 10, 2019
    Applicant: Winbond Electronics Corp.
    Inventors: Yi-Tsung Tsai, Yu-Chun Yang, Fang-Wei Lin, Hsin-Li Kuo
  • Publication number: 20150153032
    Abstract: A lamp comprises a heat-dissipation member, a light module, and a lampshade. The heat-dissipation member includes a heat sink and two first engaging mechanisms. The heat sink has a supporting surface. The first engaging mechanisms respectively project from the supporting surface and have an L-shaped extending portion and an engaging portion. The extending portion connects to the supporting surface, and the engaging portion connects to an end of the extending portion. The engaging portion and the supporting surface have an inclined angle. The light module is disposed on the supporting surface. The lampshade has two second engaging mechanisms respectively formed on two parallel sides thereof. The second engaging mechanisms respectively have a recess for receiving the engaging portion of the first engaging mechanism, wherein the second engaging mechanism cover the engaging portion and a part of the extending portion.
    Type: Application
    Filed: July 3, 2014
    Publication date: June 4, 2015
    Inventors: Yi-Tsung TSAI, Ho-Shun YANG
  • Patent number: 6237165
    Abstract: An electromagnetic control device for controlling a flush valve of a flush tank includes a housing, a lever pivotally coupled to the housing to actuate the flush valve. A casing is secured in the housing for slidably receiving an armature which is coupled to the lever with a spring member. An electromagnetic device may actuate the armature to operate the lever via the spring member. A number of plates and one or more magnets are disposed in the casing for maintaining the electromagnetic field generated by the electromagnetic device.
    Type: Grant
    Filed: April 18, 2000
    Date of Patent: May 29, 2001
    Assignee: E. Flush Tech Co., Ltd.
    Inventors: Kuan Pao Chen, Yi Tsung Tsai