Patents by Inventor Yi Wen Chiang

Yi Wen Chiang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230215797
    Abstract: A board-level pad pattern includes staggered ball pads disposed within a surface mount region for mounting a multi-row QFN package. The staggered ball pads include first ball pads arranged in a first row and second ball pads arranged in a second row. The first ball pads in the first row are arranged at two different pitches, and the second ball pads in the second row are arranged at a constant pitch.
    Type: Application
    Filed: December 6, 2022
    Publication date: July 6, 2023
    Applicant: MEDIATEK INC.
    Inventors: Hui-Chi Tang, Hsuan-Yi Lin, Shao-Chun Ho, Yi-Wen Chiang, Pu-Shan Huang
  • Patent number: 11276806
    Abstract: A semiconductor device package includes a carrier, a die, an encapsulation layer and a thickness controlling component. The die is disposed on the carrier, wherein the die includes a first surface. The encapsulation layer is disposed on the carrier, and encapsulates a portion of the first surface of the die. The encapsulation layer defines a space exposing another portion of the first surface of the die. The thickness controlling component is disposed in the space.
    Type: Grant
    Filed: January 3, 2020
    Date of Patent: March 15, 2022
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Yi Wen Chiang, Kuang-Hsiung Chen, Lu-Ming Lai, Hsun-Wei Chan, Hsin-Ying Ho, Shih-Chieh Tang
  • Publication number: 20210210662
    Abstract: A semiconductor device package includes a carrier, a die, an encapsulation layer and a thickness controlling component. The die is disposed on the carrier, wherein the die includes a first surface. The encapsulation layer is disposed on the carrier, and encapsulates a portion of the first surface of the die. The encapsulation layer defines a space exposing another portion of the first surface of the die. The thickness controlling component is disposed in the space.
    Type: Application
    Filed: January 3, 2020
    Publication date: July 8, 2021
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Yi Wen CHIANG, Kuang-Hsiung CHEN, Lu-Ming LAI, Hsun-Wei CHAN, Hsin-Ying HO, Shih-Chieh TANG
  • Patent number: 10436635
    Abstract: An optical device includes an active optical component including an optical area, an encapsulant covering the active optical component, and a passive optical component adhered to the encapsulant above the active optical component. The passive optical component has an optical axis, and the optical axis is substantially aligned with a center of the optical area.
    Type: Grant
    Filed: September 15, 2016
    Date of Patent: October 8, 2019
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Yi Wen Chiang, Hsin-Ying Ho, Hsun-Wei Chan, Lu-Ming Lai
  • Publication number: 20170082485
    Abstract: An optical device includes an active optical component including an optical area, an encapsulant covering the active optical component, and a passive optical component adhered to the encapsulant above the active optical component. The passive optical component has an optical axis, and the optical axis is substantially aligned with a center of the optical area.
    Type: Application
    Filed: September 15, 2016
    Publication date: March 23, 2017
    Inventors: Yi Wen CHIANG, Hsin-Ying HO, Hsun-Wei CHAN, Lu-Ming LAI
  • Publication number: 20110136169
    Abstract: The present invention relates to novel expression systems and methods for preparing samples for 3D structure determination of a protein based on a protein expression vector, E. coli host, and specific growth media.
    Type: Application
    Filed: November 22, 2010
    Publication date: June 9, 2011
    Applicant: RUTGERS, THE STATE UNIVERSITY OF NEW JERSEY
    Inventors: Stephen Anderson, Yi Wen Chiang