Patents by Inventor Yi-Wen Lin

Yi-Wen Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090154174
    Abstract: A backlight module includes a panel, a base, at least a light-emitting element, a heat-dissipating board and at least a circuit board. The base is connected to the panel to form an accommodating space. The light-emitting element is disposed in the accommodating space. The heat-dissipating board is disposed on the base and connected to the base. The heat-dissipating board includes at least two connecting portions and a top portion. The connecting portions are respectively connected to two ends of the top portion and the base to separate the top portion from the base for forming a heat-dissipating space therebetween. The circuit board is disposed on an outer surface of the top portion far away from the base.
    Type: Application
    Filed: April 21, 2008
    Publication date: June 18, 2009
    Applicant: YOUNG LIGHTING TECHNOLOGY CORPORATION
    Inventors: Bor-Jyh Pan, Yi-Wen Lin
  • Patent number: 7545196
    Abstract: Clocks are distributed efficiently to regions of a specialized processing block in a PLD. Multiple clocks are selected from a larger universe of clocks and distributed to the specialized processing block, but the choices of clocks at the individual functional regions, or stages of functional regions, are less than fully flexible. In some cases, an entire region may use one clock. In another case, portions of a stage within a region that previously had been able to select individual clocks must use one clock for the entire stage. In another case, only a subset of the selected clocks is available for a particular region, but that subset is flexibly distributable within the region. In another case, a clock may be selectable for each stage of each functional region directly from the larger universe of available clocks, avoiding the need for circuitry to select the multiple clocks from the larger universe.
    Type: Grant
    Filed: October 17, 2006
    Date of Patent: June 9, 2009
    Assignee: Altera Corporation
    Inventors: Michael D. Hutton, Kumara Tharmalingam, Yi-Wen Lin, David Neto
  • Publication number: 20090109060
    Abstract: The present invention discloses an optical-film traffic sign, which comprises: a light-guide element, an optical film and at least one light source. A plurality of diffusion dots is printed on the light-guide element. The light from the light source is repeatedly scattered by the diffusion dots. Thereby, the light-guide element becomes a highly uniform planar light source. The optical film having a traffic sign is applied onto the surface of the light-guide element to form a slim and uniformly-luminous traffic sign. The present invention may adopt LED as the light source and thus has the advantage of energy saving.
    Type: Application
    Filed: October 30, 2007
    Publication date: April 30, 2009
    Inventors: Yu-Nan Liu, Yi-Wen Lin, Hui-Ying Chiang, Tai-Lung Chang, Chun-Fang Hsieh, Jing-Nuan Lai, Shou-Chang Yeh
  • Publication number: 20080181881
    Abstract: Disclosed are a method of for treating insulin resistance and a method identifying a compound for treating insulin resistance.
    Type: Application
    Filed: January 30, 2007
    Publication date: July 31, 2008
    Applicant: ACADEMIA SINICA
    Inventors: Chih-Cheng Chen, Shyh-Jer Huang, Yi-Wen Lin
  • Publication number: 20080153320
    Abstract: A space-saving IC card and card slot arrangement in which the IC card has a flat substrate with a rectangular front protrusion forwardly extending from a part of the front side thereof for insertion into a card slot in a mobile electronic device, and an IC chip installed in the rectangular front protrusion and having stored therein a data.
    Type: Application
    Filed: December 20, 2006
    Publication date: June 26, 2008
    Inventor: Yi-Wen Lin
  • Patent number: 7343470
    Abstract: Techniques are provided for synchronously transmitting data in parallel from an external memory device to a destination circuit using a sequential read mode. The memory device includes an address counter. The address counter generates sequential read addresses for the data bits stored in the memory device. The destination circuit generates a clock signal that controls the address counter. The destination circuit can also transmit a start address to the memory device. The address counter sequentially generates a new read address in response to transitions in the clock signal beginning with the start address. Data bits are transferred in parallel from the memory device to the destination circuit.
    Type: Grant
    Filed: September 26, 2003
    Date of Patent: March 11, 2008
    Assignee: Altera Corporation
    Inventors: Juju Joyce, Dan Mansur, David Jefferson, Changsong Zhang, Yi-Wen Lin
  • Publication number: 20070274064
    Abstract: The invention is directed towards a backlight module including a light box and a plurality of lamps in the light box. The light box includes a bottom plate and an opening above the bottom plate. The lamp is disposed at an angle to the bottom plate of the light box. The present invention further provides a liquid crystal display including the above backlight module and a liquid crystal panel. The backlight module provides the plane light source for display. By using the backlight module of this invention, uniform plane light source is provided and display quality of the liquid display panel is enhanced.
    Type: Application
    Filed: May 25, 2006
    Publication date: November 29, 2007
    Inventors: Yi-Wen Lin, Chih-Chie Chen, Ea-Si Lee
  • Publication number: 20070185951
    Abstract: A specialized processing block for a programmable logic device includes circuitry for performing multiplications and sums thereof, as well as circuitry for rounding the result. The rounding circuitry can selectably perform round-to-nearest and round-to-nearest-even operations. In addition, the bit position at which rounding occurs is preferably selectable. The specialized processing block preferably also includes saturation circuitry to prevent overflows and underflows, and the bit position at which saturation occurs also preferably is selectable. The selectability of both the rounding and saturation positions provides control of the output data word width. The rounding and saturation circuitry may be selectably located in different positions based on timing needs. Similarly, rounding may be speeded up using a look-ahead mode in which both rounded and unrounded results are computed in parallel, with the rounding logic selecting between those results.
    Type: Application
    Filed: June 5, 2006
    Publication date: August 9, 2007
    Applicant: Altera Corporation
    Inventors: Kwan Yee Martin Lee, Martin Langhammer, Yi-Wen Lin, Triet M. Nguyen
  • Publication number: 20070185952
    Abstract: A specialized processing block for a programmable logic device incorporates a fundamental processing unit that performs a sum of two multiplications, adding the partial products of both multiplications without computing the individual multiplications. Such fundamental processing units consume less area than conventional separate multipliers and adders. The specialized processing block further has input and output stages, as well as a loopback function, to allow the block to be configured for various digital signal processing operations.
    Type: Application
    Filed: June 5, 2006
    Publication date: August 9, 2007
    Applicant: Altera Corporation
    Inventors: Martin Langhammer, Kwan Yee Martin Lee, Orang Azgomi, Keone Streicher, Yi-Wen Lin
  • Patent number: 7051153
    Abstract: A memory array configured to operate as a shift register includes a first column of memory cells with an input and an output and at least a second column of memory cells with an input and an output. The memory array also includes a multiplexer that is connected between the output of the first column of memory cells and the input of the second column of memory cells. The memory array can be operated as a shift register by shifting data from the first column of memory cells to the second column of memory cells through the multiplexer rather than using general routing lines.
    Type: Grant
    Filed: May 6, 2002
    Date of Patent: May 23, 2006
    Assignee: Altera Corporation
    Inventors: Yi-Wen Lin, Changsong Zhang, David Jefferson, Srinivas Reddy
  • Publication number: 20030098855
    Abstract: A portable communication device with reading function is disclosed. The device allows a name card to be inserted into a name card insertion slot and the data on the name card is rapidly read, and a microprocessor (CPU) classifies the read data and store into a specific name card data file memory so as to conveniently provide the user the relevant data of a clients, friends and relatives.
    Type: Application
    Filed: November 26, 2001
    Publication date: May 29, 2003
    Inventor: Yi Wen Lin