Abstract: The invention provides a display panel, which includes a first substrate, a second substrate, a liquid crystal layer, a light shielding pattern layer and a plurality of pixel structures. The liquid crystal layer is disposed between the first substrate and the second substrate, and includes a plurality of negative liquid crystal molecules. Each of the pixel structures includes a first electrode and a second electrode. The first electrode has an electrode opening and a first finger portion extending into the electrode opening. The second electrode has two second finger portions overlapping the electrode opening. The first finger portion and the two second finger portions are alternately arranged along a first direction inside the electrode opening and extend in a second direction.

Abstract: Methods of using magnetized elderberry ferment for antioxidation, preventing osteoporosis and/or improving immunity include administering to a subject in need thereof a composition including a magnetized elderberry ferment, wherein the magnetized elderberry ferment is obtained by sequentially fermenting the elderberry extract with yeast, Streptococcus thermophilus, and Acetobacter aceti in a fermenter under magnetized environment.

Abstract: A method includes placing a package component over a carrier, encapsulating the package component in an encapsulant, and forming a connection structure over and electrically coupling to the package component. The formation of the connection structure includes forming a first via group over and electrically coupling to the package component, forming a first conductive trace over and contacting the first via group, forming a second via group overlying and contacting the first conductive trace, wherein each of the first via group and the second via group comprises a plurality of vias, forming a second conductive trace over and contacting the second via group, forming a top via overlying and contacting the second conductive trace, and forming an Under-Bump-Metallurgy (UBM) over and contacting the top via.

Abstract: An internet data collection method includes steps of receiving a collecting instruction, the collecting instruction corresponds to target data that marked on a web page; retrieving a web address corresponding to the web page and the location information of the target data on the web page; and storing the web address and the location information as a tag to an operating end.

Abstract: Provided is an in vitro method for making a recombinant DNA molecule. The method includes combining in vitro a recombination-site-mediated evolution (a SCRaMbLE) ready DNA polynucleotide that contains at least one transcription unit (TU) and an introduced site-specific recombinase recognition sites that can be recognized by a recombinase, with a recombinase that recognizes the site-specific recombinase recognition sites. The method results in a polynucleotide that is recombined to provide a recombined polynucleotide. The method may further include determining the sequence, or determining the expression of the recombined polynucleotide. Polynucleotides made by this process, and modified yeast that contain the modified polynucleotides, are also provided.

Abstract: An electronic device includes a metal back cover and an antenna module. The metal back cover includes a slit. The antenna module is separated from the metal back cover and disposed far away from the slit. The antenna module includes an antenna radiator, a first ground radiator, and a connection radiator. The antenna radiator includes a first section, a second section, and a third section that are sequentially connected and form bends, and the first section has a feeding end. A first slot is formed between the first ground radiator, the first section, the second section, and a part of the third section. A width and length of the first slot are associated with a center frequency and impedance matching of a high frequency band.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a semiconductor substrate and a magnetic element over the semiconductor substrate. The semiconductor device structure also includes an isolation layer covering the magnetic element and a portion of the semiconductor substrate. The isolation layer contains a polymer material. The semiconductor device structure further includes a conductive line over the isolation layer and extending exceeding edges of the magnetic element.

Abstract: A near-eye light field display device is provided. The near-eye light field display device includes a first lens, a micro-lens array, a second lens, and a display panel. The display panel is adapted to provide an image beam. An eye-side surface of the micro-lens array is provided with a plurality of eye-side micro lenses, and a display-side surface thereof is provided with a plurality of display-side micro lenses. The eye-side micro lenses are arranged equidistantly in a first pitch. The display-side micro lenses are arranged equidistantly in a second pitch. The first pitch is different from the second pitch.

Abstract: The present disclosure relates to systems and methods for monitoring control. The systems may obtain one or more monitoring images associated with a monitoring region captured by a monitoring device. The systems may determine whether a target event occurs in the monitoring region based on the one or more monitoring images. In response to determining that the target event occurs in the monitoring region, the systems may obtain a target time period associated with operations of a warning light associated with the monitoring device based on at least one parameter of the monitoring device. The systems may control the operations of the warning light based on the target time period.

Abstract: A computer system, method, and computer program product comprise clustering data of search results of a topic of interest into a hierarchical knowledge tree format, monitoring computer user behavior regarding the search results, and processing a determined result of the monitored computer user behavior and the clustered data of the search results to generate a knowledge graph based on the topic of interest.

Abstract: The inhibition device includes a micro-controller configured with a triggering condition including a number of intervals and, for each interval, a corresponding duration and a corresponding threshold. Each interval is a range specifying how much the vehicle's acceleration pedal has changed its position in terms of percentages of a pedal stroke. Each duration specifies the fastest time duration allowable for the acceleration pedal to attain a corresponding interval of pedal position change. The micro-controller converts progress signals of the acceleration pedal to corresponding percentages, obtains a difference DEF between the successive percentages, records a time duration RES between successive progress signals, and calculates DEF/RES=X. When X is greater than or equal to a threshold of a corresponding interval, the micro-controller sends an idle signal to the vehicle's engine control unit or intercepts the progress signals to prevent them from reaching the engine control unit.

Abstract: A device includes an interconnect device attached to a redistribution structure, wherein the interconnect device includes conductive routing connected to conductive connectors disposed on a first side of the interconnect device, a molding material at least laterally surrounding the interconnect device, a metallization pattern over the molding material and the first side of the interconnect device, wherein the metallization pattern is electrically connected to the conductive connectors, first external connectors connected to the metallization pattern, and semiconductor devices connected to the first external connectors.

Abstract: An electronic device includes a metal back cover and an antenna module. The metal back cover includes a slot. The antenna module is located in the metal back cover. The antenna module includes a first radiator, second radiator, third radiator, fourth radiator, and fifth radiator. The first radiator has a feeding end. The second radiator connected to the first radiator has a contact portion which is connected to the metal back cover. The third radiator is connected to the second radiator and is located beside the first radiator. The third radiator has a first grounding terminal. The fourth radiator is connected to the second radiator and has a second grounding terminal. The fifth radiator is connected to the third radiator and the fourth radiator. Distances between the feeding end and the slot, the first grounding terminal and the slot, and the second grounding terminal and the slot all range from 3.5 mm to 10 mm.

Abstract: A light-emitting diode includes a light-emitting epitaxial layer having a first surface as a light-emitting surface and a second surface opposing the first surface, a first type semiconductor layer, an active layer, and a second type semiconductor layer; a transparent dielectric layer located on the second surface and in direct contact with the light-emitting epitaxial laminated layer, and having conductive through-holes therein; a transparent conductive layer located on one side surface of the transparent dielectric layer that is distal from the light-emitting epitaxial laminated layer; and a metal reflective layer located on one side surface of the transparent conductive layer that is distal from the transparent dielectric layer; wherein the transparent dielectric layer includes a first layer and a second layer; and wherein the first layer is thicker than the second layer, and a refractivity of the first layer is less than a refractivity of the second layer.

Abstract: Interconnect devices, packaged semiconductor devices and methods are disclosed herein that are directed towards embedding a local silicon interconnect (LSI) device and through substrate vias (TSVs) into system on integrated substrate (SoIS) technology with a compact package structure. The LSI device may be embedded into SoIS technology with through substrate via integration to provide die-to-die FL connection arrangement for super large integrated Fan-Out (InFO) for SBT technology in a SoIS device. Furthermore, the TSV connection layer may be formed using lithographic or photoresist-defined vias to provide eLSI P/G out to a ball-grid-array (BGA) connection interface.

Abstract: A memory device includes a substrate, a first transistor, a second transistor, and a capacitor. The first transistor is over the substrate and includes a select gate. The second transistor is over the substrate and connected to the first transistor in series, in which the second transistor includes a floating gate. The capacitor is over the substrate and connected to the second transistor, wherein the capacitor includes a top electrode, a bottom electrode in the substrate, and an insulating layer between the top electrode and the bottom electrode. The insulating layer includes nitrogen. A nitrogen concentration of the insulating layer increases in a direction from the top electrode to the bottom electrode.

Abstract: The present invention provides a system and method for analysis of integrated circuit testing anomalies based on deep learning. Through repeated training by deep learning with historical test data accumulated during testing, automatic optimization of parameter settings depending on learning and training conditions is made possible. Moreover, based on real-time test data, testing anomalies can be predicted and early warnings against them can be provided to allow advanced intervention for preventing their occurrence. Additionally, for testing anomalies that have occurred, solutions can be automatically identified and provided, which shorten the times taken by different technicians to address the anomalies, resulting in more effective utilization of the equipment and lower testing cost.

Abstract: An embodiment device includes: a first dielectric layer; a first photonic die and a second photonic die disposed adjacent a first side of the first dielectric layer; a waveguide optically coupling the first photonic die to the second photonic die, the waveguide being disposed between the first dielectric layer and the first photonic die, and between the first dielectric layer and the second photonic die; a first integrated circuit die and a second integrated circuit die disposed adjacent the first side of the first dielectric layer; conductive features extending through the first dielectric layer and along a second side of the first dielectric layer, the conductive features electrically coupling the first photonic die to the first integrated circuit die, the conductive features electrically coupling the second photonic die to the second integrated circuit die; and a second dielectric layer disposed adjacent the second side of the first dielectric layer.

Abstract: Immunogenic compositions comprising hemagglutinin (HA) variants and/or neuraminidase (NA) variants, which may be contained in an influenza A virus, and uses thereof for eliciting immune responses against influenza A virus.

Abstract: Circuit board includes conductive plate, core dielectric layer, metallization layer, first build-up stack, second build-up stack. Conductive plate has channels extending from top surface to bottom surface. Core dielectric layer extends on covering top surface and side surfaces of conductive plate. Metallization layer extends on core dielectric layer and within channels of conductive plate. Core dielectric layer insulates metallization layer from conductive plate. First build-up stack is disposed on top surface of conductive plate and includes conductive layers alternately stacked with dielectric layers. Conductive layers electrically connect to metallization layer. Second build-up stack is disposed on bottom surface of conductive plate. Second build-up stack includes bottommost dielectric layer and bottommost conductive layer. Bottommost dielectric layer covers bottom surface of conductive plate.