Patents by Inventor Yi-Yiing Chiang

Yi-Yiing Chiang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060284263
    Abstract: A semiconductor device including at least one conductive structure is provided. The conductive structure includes a silicon-containing conductive layer, a refractory metal salicide layer and a protection layer. The refractory metal salicide layer is disposed over the silicon-containing conductive layer. The protection layer is disposed over the refractory metal salicide layer. Another semiconductor device including at least one conductive structure is also provided. The conductive structure includes a silicon-containing conductive layer, a refractory metal alloy salicide layer and a protection layer. The refractory metal alloy salicide layer is disposed over the silicon-containing conductive layer. The refractory metal alloy salicide layer is formed from a reaction of silicon of the silicon-containing conductive layer and a refractory metal alloy layer which includes a first refractory metal and a second refractory metal. The protection layer is disposed over the refractory metal alloy salicide layer.
    Type: Application
    Filed: June 15, 2005
    Publication date: December 21, 2006
    Inventors: Yu-Lan Chang, Chao-Ching Hsieh, Yi-Yiing Chiang, Yi-Wei Chen, Tzung-Yu Hung
  • Publication number: 20060240666
    Abstract: A method of forming silicide is described. A layer of refractory metal is deposited on a substrate, and then a first annealing process is performed to form silicide, followed by removal of unreacted metal. Next, a species implanting process is carried out to implant species of neutral atoms into the silicide to break up lattice structure of the silicide, so that the problem of junction leakage induced by spiking and piping diffusion under high temperature during a subsequent second annealing process is avoided.
    Type: Application
    Filed: April 20, 2005
    Publication date: October 26, 2006
    Inventors: Chao-Ching Hsieh, Yi-Yiing Chiang, Chien-Chung Huang, Po-Chao Tsou, Kirk Hsu, Tony Lin, Le-Tien Jung
  • Publication number: 20060154474
    Abstract: A method of fabricating a metal silicide layer over a substrate is provided. First, a hard mask layer is formed over a gate formed on a substrate and a portion of the substrate is exposed. Thereafter, a first metal silicide layer, which is a cobalt silicide or a titanium silicide layer, is formed on the exposed substrate. After that, the hard mask layer is removed and a second metal silicide layer is formed over the gate, wherein a material of the second metal silicide layer is selected from a group consisting of nickel silicide, platinum silicide, palladium silicide and nickel alloy. Since different metal silicide layers are formed on the substrate and the gate, the problem of having a high resistance in lines with a narrow line width and the problem of nickel silicide forming spikes and pipelines in the source region and the drain region are improved.
    Type: Application
    Filed: January 11, 2005
    Publication date: July 13, 2006
    Inventors: Yi-Wei Chen, Tzung-Yu Hung, Yi-Yiing Chiang, Chao-Ching Hsieh, Yu-Lan Chang