Abstract: A channel hiatus correction method for an HDMI device is provided. A recovery code from scrambled data of the stream is obtained. A liner feedback shift register (LFSR) value of channels of the HDMI port is obtained based on the recovery code and the scrambled data of the stream. The stream is de-scrambled according to the LFSR value of the channels of the HDMI port. Video data is displayed according to the de-scrambled stream.

Abstract: Provided are a circuit apparatus, a manufacturing method thereof, and a circuit system. The circuit apparatus includes a flexible circuit board, a flexible packaging material layer and an electronic device. The flexible circuit board has at least one hollow pattern, wherein the flexible circuit board has an inner region and a peripheral region surrounding the inner region, and has a first surface and a second surface opposite to each other. The flexible packaging material layer is disposed in the at least one hollow pattern. The electronic device is disposed on the first surface of the flexible circuit board and electrically connected with the flexible circuit board.

Abstract: A detection system and method for the migrating cell is provided. The system is configured to detect a migrating cell combined with an immunomagnetic bead. The system includes a platform, a microchannel, a magnetic field source, a coherent light source and an optical sensing module. The microchannel is configured to allow the migrating cell to flow in it along a flow direction. The magnetic field source is configured to provide magnetic force to the migrating cell combined with the immunomagnetic bead. The magnetic force includes at least one magnetic force component and the magnetic force component is opposite to the flow direction of the microchannel. The coherent light source is configured to provide the microchannel with the coherent light. The optical sensing module is configured to receive the interference light caused by the coherent light being reflected by the sample inside the microchannel.

Abstract: A semiconductor package including two different adhesives and a method of forming are provided. The semiconductor package may include a package component having a semiconductor die bonded to a substrate, a first adhesive over the substrate, a heat transfer layer on the package component, and a lid attached to the substrate by a second adhesive. The first adhesive may encircle the package component and the heat transfer layer. The lid may include a top portion on the heat transfer layer and the first adhesive, and a bottom portion attached to the substrate and encircling the first adhesive. A material of the second adhesive may be different from a material of the first adhesive.

Abstract: A system for measuring impedance which is tolerant of connection errors includes a measuring instrument and a relay plate. The relay plate includes a plurality of relay groups. A relay group comprises a first channel, a second channel, a third channel, and a fourth channel. The first to fourth channels are electrically connected to a conductive pin of the product. The relay board further comprises a first voltage interface, a second voltage interface, a first current interface, and a second current interface, the first voltage interface is electrically connected to the first channel, the first current interface is electrically connected to the second channel, the second voltage interface is electrically connected to the third channel, and the second current interface is electrically connected to the fourth channel, a control unit being able to switch between these when connected to obtain impedance measurements.

Abstract: A system for measuring impedance which is tolerant of connection errors includes a measuring instrument and a relay plate. The relay plate includes a plurality of relay groups. A relay group comprises a first channel, a second channel, a third channel, and a fourth channel. The first to fourth channels are electrically connected to a conductive pin of the product. The relay board further comprises a first voltage interface, a second voltage interface, a first current interface, and a second current interface, the first voltage interface is electrically connected to the first channel, the first current interface is electrically connected to the second channel, the second voltage interface is electrically connected to the third channel, and the second current interface is electrically connected to the fourth channel, a control unit being able to switch between these when connected to obtain impedance measurements.

Abstract: An optical integration device includes a first circuit layer comprising a first surface adjacent a first diffractive layer, the first diffractive layer arranged on a side of the first circuit layer along a first direction, and a first connecting pad electrically connected with the first circuit layer through a first conductive member. The optical integration device includes a side surface extending along the first direction. The side surface defines a first concavity extending through the first diffractive layer along the first direction. The first connecting pad includes a first mounting member connected with the side surface, and a first convex member extending from the first mounting member and received in the first concavity. The first conductive member includes a first conductive part arranged between the side surface and the first mounting member, and a second conductive part arranged between the first surface and the first convex member.

Abstract: Systems and methods for reducing prediction uncertainty in a prediction model associated with a patterning process are described. These may be used in calibrating a process model associated with the patterning process, for example. Reducing the uncertainty in the prediction model may include determining a prediction uncertainty parameter based on prediction data. The prediction data may be determined using the prediction model. The prediction model may have been calibrated with calibration data. The prediction uncertainty parameter may be associated with variation in the prediction data. Reducing the uncertainty in the prediction model may include selecting a subset of process data based on the prediction uncertainty parameter; and recalibrating the prediction model using the calibration data and the selected subset of the process data.

Abstract: A method for training a patterning process model, the patterning process model configured to predict a pattern that will be formed by a patterning process. The method involves obtaining an image data associated with a desired pattern, a measured pattern of the substrate, a first model including a first set of parameters, and a machine learning model including a second set of parameters; and iteratively determining values of the first set of parameters and the second set of parameters to train the patterning process model. An iteration involves executing, using the image data, the first model and the machine learning model to cooperatively predict a printed pattern of the substrate; and modifying the values of the first set of parameters and the second set of parameters such that a difference between the measured pattern and the predicted pattern is reduced.

Abstract: An optical integration device includes a first circuit layer comprising a first surface adjacent a first diffractive layer, the first diffractive layer arranged on a side of the first circuit layer along a first direction, and a first connecting pad electrically connected with the first circuit layer through a first conductive member. The optical integration device includes a side surface extending along the first direction. The side surface defines a first concavity extending through the first diffractive layer along the first direction. The first connecting pad includes a first mounting member connected with the side surface, and a first convex member extending from the first mounting member and received in the first concavity. The first conductive member includes a first conductive part arranged between the side surface and the first mounting member, and a second conductive part arranged between the first surface and the first convex member.

Abstract: A method for making a mask includes receiving an integrated circuit (IC) design layout and identifying at least one targeted-feature-surrounding-location (TFSL) in the IC design layout, wherein TFSL is identified by a model-based approach. The method further includes inserting at least one phase bar (PB) in the IC design layout and performing an optical proximity correction (OPC) to the IC design layout having the at least one PB to form a modified IC design layout. A mask is then fabricated based on the modified IC design layout.

Abstract: A method for making a mask includes receiving an integrated circuit (IC) design layout and identifying at least one targeted-feature-surrounding-location (TFSL) in the IC design layout, wherein TFSL is identified by a model-based approach. The method further includes inserting at least one phase bar (PB) in the IC design layout and performing an optical proximity correction (OPC) to the IC design layout having the at least one PB to form a modified IC design layout. A mask is then fabricated based on the modified IC design layout.

Abstract: A method for making a mask for an integrated circuit (IC) design includes receiving an IC design layout having a plurality IC features and performing a targeted-feature-surrounding (TFS) checking operation to identify a targeted-feature-surrounding-location (TFSL) in the IC design layout. The method also includes inserting a phase-bar (PB) to the TFSL, performing an optical proximity correction (OPC) to the IC design layout having the PB to form a modified IC design layout and providing the modified IC design layout for fabrication of the mask.

Abstract: A method for making a mask for an integrated circuit (IC) design includes receiving an IC design layout having a plurality IC features and performing a targeted-feature-surrounding (TFS) checking operation to identify a targeted-feature-surrounding-location (TFSL) in the IC design layout. The method also includes inserting a phase-bar (PB) to the TFSL, performing an optical proximity correction (OPC) to the IC design layout having the PB to form a modified IC design layout and providing the modified IC design layout for fabrication of the mask.

Abstract: An exemplary driving circuit (400) for a backlight module includes a control circuit (420), a first driving branch circuit (440), a second driving branch circuit (450), and a light source (430). The control circuit is configured for providing a driving signal to the light source via the first driving branch circuit, and the second driving branch circuit is configured for providing a substitution driving signal to the light source according to intensity of ambient light beams. The first and second driving branch circuits are configured for driving the light source alternatively.

Abstract: An integrated circuit for a liquid crystal panel (20) includes a booster circuit (221), which has a plurality of output terminals (225); a control circuit (222); a register (223); and a plurality of switchers (224). Each switch has a control terminal (2241) being connected to the register, a first terminal (2242) being connected to the output terminal of the booster circuit, and a second terminal (2243) being connected to the control circuit.

Abstract: An exemplary liquid crystal display (200) includes an LCD panel (210), a driving integrated circuit (IC) (220) provided with the LCD panel and configured for driving the LCD panel to display image, and an initialization IC (240) provided with the LCD panel and configured for initializing the driving IC at each time that the LCD is turned on. In a test of the LCD panel to detect whether there are any abnormalities, the driving IC mounted on the LCD panel can be initialized by the initialization IC.

Abstract: An exemplary liquid crystal display (20) includes a liquid crystal panel, a driving chip (200) and an external resistor (270). The driving chip is configured for driving the liquid crystal panel. The driving chip includes a storage circuit (210) and a voltage generator (260). The storage circuit includes a memory (240). The external resistor is connected to the storage circuit and the voltage generator. The voltage generator outputs a voltage, the external resistor divides the voltage into a common voltage. The storage circuit transforms the common voltage to a common voltage parameter, and the memory stores the common voltage parameter. The LCD has high reliability.