Patents by Inventor Yi-Yuan Chang

Yi-Yuan Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240162833
    Abstract: A power supply unit supplies power to a load, and the power supply unit includes a power factor corrector, a DC conversion module, and an isolated conversion module. The power factor corrector is plugged into a first main circuit board and converts an AC power into a DC power. The DC conversion module is plugged into the first main circuit board and converts the DC power into a main power. The isolated conversion module includes a bus capacitor, the bus capacitor is coupled to the DC conversion module through a first power copper bar, and coupled to the power factor corrector through a second power copper bar. The first power copper bar and the second power copper bar are arranged on a side opposite to the first main circuit board, and are arranged in parallel with the first main circuit board.
    Type: Application
    Filed: November 13, 2023
    Publication date: May 16, 2024
    Inventors: Yi-Sheng CHANG, Cheng-Chan HSU, Chia-Wei CHU, Chun-Yu YANG, Deng-Cyun HUANG, Yi-Hsun CHIU, Chien-An LAI, Yu-Tai WANG, Chi-Shou HO, Zhi-Yuan WU, Ko-Wen LU
  • Patent number: 11983475
    Abstract: A semiconductor device includes: M*1st conductors in a first layer of metallization (M*1st layer) and being aligned correspondingly along different corresponding ones of alpha tracks and representing corresponding inputs of a cell region in the semiconductor device; and M*2nd conductors in a second layer of metallization (M*2nd layer) aligned correspondingly along beta tracks, and the M*2nd conductors including at least one power grid (PG) segment and one or more of an output pin or a routing segment; and each of first and second ones of the input pins having a length sufficient to accommodate at most two access points; each of the access points of the first and second input pins being aligned to a corresponding different one of first to fourth beta tracks; and the PG segment being aligned with one of the first to fourth beta tracks.
    Type: Grant
    Filed: February 7, 2023
    Date of Patent: May 14, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Pin-Dai Sue, Po-Hsiang Huang, Fong-Yuan Chang, Chi-Yu Lu, Sheng-Hsiung Chen, Chin-Chou Liu, Lee-Chung Lu, Yen-Hung Lin, Li-Chun Tien, Yi-Kan Cheng
  • Publication number: 20240142344
    Abstract: In example implementations described herein, there are systems and methods enabling manufacturers to become more efficient by providing a digital tool to track, visualize, quantify, and notify production bottlenecks for quick actions. Some implementations include an apparatus including a processor configured to analyze time-stamp data collected associated with a plurality of elements of an industrial process. The processor may be configured to generate, based on the analyzed time-stamp data, a color coded visualization of the industrial process, where generating the color coded visualization includes associating each of the plurality of elements of the industrial process with a corresponding color indicating a state of an element in the plurality of elements of the industrial process. The processor may further be configured to present, via a display, the generated color coded visualization of the industrial process.
    Type: Application
    Filed: October 28, 2022
    Publication date: May 2, 2024
    Inventors: Wei YUAN, Yi-chu CHANG, Lili ZHENG
  • Publication number: 20240120639
    Abstract: A 3D IC package is provided. The 3D IC package includes: a first IC die comprising a first substrate at a back side of the first IC die; a second IC die stacked at the back side of the first IC die and facing the first substrate; a TSV through the first substrate and electrically connecting the first IC die and the second IC die, the TSV having a TSV cell including a TSV cell boundary surrounding the TSV; and a protection module fabricated in the first substrate, wherein the protection module is electrically connected to the TSV, and the protection module is within the TSV cell.
    Type: Application
    Filed: August 10, 2023
    Publication date: April 11, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Po-Hsiang Huang, Fong-Yuan Chang, Tsui-Ping Wang, Yi-Shin Chu
  • Publication number: 20240120203
    Abstract: A method includes forming a dummy gate over a semiconductor fin; forming a source/drain epitaxial structure over the semiconductor fin and adjacent to the dummy gate; depositing an interlayer dielectric (ILD) layer to cover the source/drain epitaxial structure; replacing the dummy gate with a gate structure; forming a dielectric structure to cut the gate structure, wherein a portion of the dielectric structure is embedded in the ILD layer; recessing the portion of the dielectric structure embedded in the ILD layer; after recessing the portion of the dielectric structure, removing a portion of the ILD layer over the source/drain epitaxial structure; and forming a source/drain contact in the ILD layer and in contact with the portion of the dielectric structure.
    Type: Application
    Filed: March 8, 2023
    Publication date: April 11, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Te-Chih HSIUNG, Yun-Hua CHEN, Bing-Sian WU, Yi-Hsuan CHIU, Yu-Wei CHANG, Wen-Kuo HSIEH, Chih-Yuan TING, Huan-Just LIN
  • Publication number: 20240105619
    Abstract: Semiconductor devices and methods of manufacture are provided wherein a metallization layer is located over a substrate, and a power grid line is located within the metallization layer. A signal pad is located within the metallization layer and the signal pad is surrounded by the power grid line. A signal external connection is electrically connected to the signal pad.
    Type: Application
    Filed: November 29, 2023
    Publication date: March 28, 2024
    Inventors: Fong-Yuan Chang, Noor Mohamed Ettuveettil, Po-Hsiang Huang, Sen-Bor Jan, Ming-Fa Chen, Chin-Chou Liu, Yi-Kan Cheng
  • Patent number: 11942543
    Abstract: A high-voltage semiconductor device structure is provided. The high-voltage semiconductor device structure includes a semiconductor substrate, a source ring in the semiconductor substrate, and a drain region in the semiconductor substrate. The high-voltage semiconductor device structure also includes a doped ring surrounding sides and a bottom of the source ring and a well region surrounding sides and bottoms of the drain region and the doped ring. The well region has a conductivity type opposite to that of the doped ring. The high-voltage semiconductor device structure further includes a conductor electrically connected to the drain region and extending over and across a periphery of the well region. In addition, the high-voltage semiconductor device structure includes a shielding element ring between the conductor and the semiconductor substrate. The shielding element ring extends over and across the periphery of the well region.
    Type: Grant
    Filed: June 29, 2022
    Date of Patent: March 26, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hung-Chou Lin, Yi-Cheng Chiu, Karthick Murukesan, Yi-Min Chen, Shiuan-Jeng Lin, Wen-Chih Chiang, Chen-Chien Chang, Chih-Yuan Chan, Kuo-Ming Wu, Chun-Lin Tsai
  • Publication number: 20240096701
    Abstract: A device includes: a stack of semiconductor nanostructures; a gate structure wrapping around the semiconductor nanostructures, the gate structure extending in a first direction; a source/drain region abutting the gate structure and the stack in a second direction transverse the first direction; a contact structure on the source/drain region; a backside conductive trace under the stack, the backside conductive trace extending in the second direction; a first through via that extends vertically from the contact structure to a top surface of the backside dielectric layer; and a gate isolation structure that abuts the first through via in the second direction.
    Type: Application
    Filed: May 17, 2023
    Publication date: March 21, 2024
    Inventors: Chun-Yuan CHEN, Huan-Chieh SU, Ching-Wei TSAI, Shang-Wen CHANG, Yi-Hsun CHIU, Chih-Hao WANG
  • Patent number: 11923302
    Abstract: Semiconductor devices and methods of manufacture are provided wherein a metallization layer is located over a substrate, and a power grid line is located within the metallization layer. A signal pad is located within the metallization layer and the signal pad is surrounded by the power grid line. A signal external connection is electrically connected to the signal pad.
    Type: Grant
    Filed: June 30, 2022
    Date of Patent: March 5, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Fong-Yuan Chang, Noor Mohamed Ettuveettil, Po-Hsiang Huang, Sen-Bor Jan, Ming-Fa Chen, Chin-Chou Liu, Yi-Kan Cheng
  • Patent number: 9095329
    Abstract: An electromagnetic thermotherapeutic apparatus includes: a plurality of needle units respectively having head portions and needle portions; a base unit having a base plate that is formed with a plurality of first through holes, and a base pad that is formed with a plurality of second through holes, the needle portions of the needle units removably extending through the second and first through holes, the head portions of the needle units abutting against the base pad; a temperature monitor disposed between the base plate and the base pad; an upper unit disposed above the base pad and abutting against the head portions; and a clamp unit clamping and pressing the base unit against the upper unit.
    Type: Grant
    Filed: January 26, 2012
    Date of Patent: August 4, 2015
    Assignee: National Cheng Kung University
    Inventors: Gwo-Bin Lee, Xi-Zhang Lin, Sheng-Chieh Huang, Yi-Yuan Chang, Yan-Shen Shan, Sheng-Jye Hwang, Tung-Jen Lee, Szu-Yin Chen, Ping-Hen Chen
  • Publication number: 20120209053
    Abstract: An electromagnetic thermotherapeutic apparatus includes: a plurality of needle units respectively having head portions and needle portions; a base unit having a base plate that is formed with a plurality of first through holes, and a base pad that is formed with a plurality of second through holes, the needle portions of the needle units removably extending through the second and first through holes, the head portions of the needle units abutting against the base pad; a temperature monitor disposed between the base plate and the base pad; an upper unit disposed above the base pad and abutting against the head portions; and a clamp unit clamping and pressing the base unit against the upper unit.
    Type: Application
    Filed: January 26, 2012
    Publication date: August 16, 2012
    Applicant: National Cheng Kung University
    Inventors: Gwo-Bin Lee, Xi-Zhang Lin, Sheng-Chieh Huang, Yi-Yuan Chang, Yan-Shen Shan, Sheng-Jye Hwang, Tung-Jen Lee, Szu-Yin Chen, Ping-Hen Chen
  • Publication number: 20120157749
    Abstract: A heat therapy for thermally treating a target tissue within a living body by using a treating apparatus including a treating device with a magnetic part is provided. The magnetic part is heated to a first temperature by a high frequency electromagnetic field with a heating rate ranging from 1 to 5° C./sec, wherein the magnetic part is contacted the target tissue. Temperature controlling steps are performed to the magnetic part having the first temperature, and therefore the magnetic part has a final temperature higher than the first temperature, and a treatment is performed to the target tissue under the final temperature. Each of the temperature controlling steps is a heating step, a cooling step or a temperature conservation step, and the magnetic part is heated or cooled by the high frequency electromagnetic field with a heating rate or a cooling rate ranging from 1 to 5° C./sec.
    Type: Application
    Filed: December 15, 2010
    Publication date: June 21, 2012
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Gwo-Bin Lee, Xi-Zhang Lin, Sheng-Chieh Huang, Yi-Yuan Chang, Chiung-Yu Chen, Yan-Shen Shan
  • Publication number: 20120022515
    Abstract: A hemostatic applicator adapted to stop a bleeding site from bleeding is provided. The hemostatic applicator includes a magnetic part, an anti-adhesion layer and a non-magnetic part. The magnetic part is suitable to be heated to a temperature with a high frequency electromagnetic field. The anti-adhesion layer is formed on a surface of the magnetic part, and the magnetic part contacts the bleeding site through the anti-adhesion layer. The non-magnetic part is connected with the magnetic part. A hemostatic module is also provided.
    Type: Application
    Filed: September 27, 2010
    Publication date: January 26, 2012
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Gwo-Bin Lee, Xi-Zhang Lin, Chong-Jeh Lo, Sheng-Chieh Huang, Yi-Yuan Chang
  • Publication number: 20110054455
    Abstract: An electromagnetic thermotherapeutic apparatus includes a tubular needle and an inner needle. The tubular needle has an electromagnetic inductive portion that is made from a material capable of generating heat when subjected to an induction magnetic field, and that has a hollow tip, and a non-electromagnetic inductive portion that is connected to the electromagnetic inductive portion oppositely of the hollow tip. The inner needle is removably insertable into the tubular needle from the non-electromagnetic inductive portion to the hollow tip.
    Type: Application
    Filed: July 13, 2010
    Publication date: March 3, 2011
    Inventors: Gwo-Bin Lee, Xi-Zhang Lin, Sheng-Chieh Huang, Yi-Yuan Chang