Patents by Inventor Yi-Yuan Huang
Yi-Yuan Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240162833Abstract: A power supply unit supplies power to a load, and the power supply unit includes a power factor corrector, a DC conversion module, and an isolated conversion module. The power factor corrector is plugged into a first main circuit board and converts an AC power into a DC power. The DC conversion module is plugged into the first main circuit board and converts the DC power into a main power. The isolated conversion module includes a bus capacitor, the bus capacitor is coupled to the DC conversion module through a first power copper bar, and coupled to the power factor corrector through a second power copper bar. The first power copper bar and the second power copper bar are arranged on a side opposite to the first main circuit board, and are arranged in parallel with the first main circuit board.Type: ApplicationFiled: November 13, 2023Publication date: May 16, 2024Inventors: Yi-Sheng CHANG, Cheng-Chan HSU, Chia-Wei CHU, Chun-Yu YANG, Deng-Cyun HUANG, Yi-Hsun CHIU, Chien-An LAI, Yu-Tai WANG, Chi-Shou HO, Zhi-Yuan WU, Ko-Wen LU
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Patent number: 11982866Abstract: An optical element driving mechanism is provided and includes a fixed assembly, a movable assembly, a driving assembly and a stopping assembly. The fixed assembly has a main axis. The movable assembly is configured to connect an optical element, and the movable assembly is movable relative to the fixed assembly. The driving assembly is configured to drive the movable assembly to move relative to the fixed assembly. The stopping assembly is configured to limit the movement of the movable assembly relative to the fixed assembly within a range of motion.Type: GrantFiled: December 15, 2022Date of Patent: May 14, 2024Assignee: TDK TAIWAN CORP.Inventors: Chao-Chang Hu, Liang-Ting Ho, Chen-Er Hsu, Yi-Liang Chan, Fu-Lai Tseng, Fu-Yuan Wu, Chen-Chi Kuo, Ying-Jen Wang, Wei-Han Hsia, Yi-Hsin Tseng, Wen-Chang Lin, Chun-Chia Liao, Shou-Jen Liu, Chao-Chun Chang, Yi-Chieh Lin, Shang-Yu Hsu, Yu-Huai Liao, Shih-Wei Hung, Sin-Hong Lin, Kun-Shih Lin, Yu-Cheng Lin, Wen-Yen Huang, Wei-Jhe Shen, Chih-Shiang Wu, Sin-Jhong Song, Che-Hsiang Chiu, Sheng-Chang Lin
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Patent number: 11983475Abstract: A semiconductor device includes: M*1st conductors in a first layer of metallization (M*1st layer) and being aligned correspondingly along different corresponding ones of alpha tracks and representing corresponding inputs of a cell region in the semiconductor device; and M*2nd conductors in a second layer of metallization (M*2nd layer) aligned correspondingly along beta tracks, and the M*2nd conductors including at least one power grid (PG) segment and one or more of an output pin or a routing segment; and each of first and second ones of the input pins having a length sufficient to accommodate at most two access points; each of the access points of the first and second input pins being aligned to a corresponding different one of first to fourth beta tracks; and the PG segment being aligned with one of the first to fourth beta tracks.Type: GrantFiled: February 7, 2023Date of Patent: May 14, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Pin-Dai Sue, Po-Hsiang Huang, Fong-Yuan Chang, Chi-Yu Lu, Sheng-Hsiung Chen, Chin-Chou Liu, Lee-Chung Lu, Yen-Hung Lin, Li-Chun Tien, Yi-Kan Cheng
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Integration scheme for breakdown voltage enhancement of a piezoelectric metal-insulator-metal device
Patent number: 11984261Abstract: Various embodiments of the present disclosure are directed towards an integrated chip including a dielectric structure sandwiched between a first electrode and a bottom electrode. A passivation layer overlies the second electrode and the dielectric structure. The passivation layer comprises a horizontal surface vertically below a top surface of the passivation layer. The horizontal surface is disposed above a top surface of the dielectric structure.Type: GrantFiled: August 25, 2021Date of Patent: May 14, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Anderson Lin, Chun-Ren Cheng, Chi-Yuan Shih, Shih-Fen Huang, Yi-Chuan Teng, Yi Heng Tsai, You-Ru Lin, Yen-Wen Chen, Fu-Chun Huang, Fan Hu, Ching-Hui Lin, Yan-Jie Liao -
Publication number: 20240130140Abstract: A semiconductor device includes a substrate having a magnetic tunneling junction (MTJ) region and a logic region, a magnetic tunneling junction (MTJ) on the MTJ region and a first metal interconnection on the MTJ. Preferably, a top view of the MTJ includes a circle and a top view of the first metal interconnection includes an ellipse overlapping the circle.Type: ApplicationFiled: December 26, 2023Publication date: April 18, 2024Applicant: UNITED MICROELECTRONICS CORP.Inventors: Ting-Hsiang Huang, Yi-Chung Sheng, Sheng-Yuan Hsueh, Kuo-Hsing Lee, Chih-Kai Kang
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Patent number: 11961714Abstract: A substrate processing apparatus comprises a chamber member that defines an interior volume that has an aspect ratio. The chamber member comprises a pair of laterally opposing inlet walls and a loading port. Each of the pair of laterally opposing inlet walls has an inlet port configured to receive output from a remote plasma source. The loading port is arranged between the pair of inlet walls, configured to allow passage of a substrate into the interior volume.Type: GrantFiled: May 31, 2021Date of Patent: April 16, 2024Assignee: LINCO TECHNOLOGY CO., LTD.Inventors: Yi-Yuan Huang, Yi-Cheng Liu
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Publication number: 20240120639Abstract: A 3D IC package is provided. The 3D IC package includes: a first IC die comprising a first substrate at a back side of the first IC die; a second IC die stacked at the back side of the first IC die and facing the first substrate; a TSV through the first substrate and electrically connecting the first IC die and the second IC die, the TSV having a TSV cell including a TSV cell boundary surrounding the TSV; and a protection module fabricated in the first substrate, wherein the protection module is electrically connected to the TSV, and the protection module is within the TSV cell.Type: ApplicationFiled: August 10, 2023Publication date: April 11, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Po-Hsiang Huang, Fong-Yuan Chang, Tsui-Ping Wang, Yi-Shin Chu
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Publication number: 20240105619Abstract: Semiconductor devices and methods of manufacture are provided wherein a metallization layer is located over a substrate, and a power grid line is located within the metallization layer. A signal pad is located within the metallization layer and the signal pad is surrounded by the power grid line. A signal external connection is electrically connected to the signal pad.Type: ApplicationFiled: November 29, 2023Publication date: March 28, 2024Inventors: Fong-Yuan Chang, Noor Mohamed Ettuveettil, Po-Hsiang Huang, Sen-Bor Jan, Ming-Fa Chen, Chin-Chou Liu, Yi-Kan Cheng
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Patent number: 11923302Abstract: Semiconductor devices and methods of manufacture are provided wherein a metallization layer is located over a substrate, and a power grid line is located within the metallization layer. A signal pad is located within the metallization layer and the signal pad is surrounded by the power grid line. A signal external connection is electrically connected to the signal pad.Type: GrantFiled: June 30, 2022Date of Patent: March 5, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Fong-Yuan Chang, Noor Mohamed Ettuveettil, Po-Hsiang Huang, Sen-Bor Jan, Ming-Fa Chen, Chin-Chou Liu, Yi-Kan Cheng
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Publication number: 20240068043Abstract: Provided is a method for diagnosing and monitoring progression of cancer or effectiveness of a therapeutic treatment. The method includes detecting a methylation level of at least one gene in a biological sample containing circulating free DNA. Also provided are primer pairs and probes for diagnosis or prognosis of cancer in a subject in need thereof.Type: ApplicationFiled: March 1, 2022Publication date: February 29, 2024Applicant: NATIONAL TAIWAN UNIVERSITYInventors: Hsing-Chen TSAI, Chong-Jen YU, Hsuan-Hsuan LU, Shu-Yung LIN, Yi-Jhen HUANG, Chen-Yuan DONG
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Publication number: 20240071731Abstract: A substrate processing apparatus, comprising: a processing chamber having a plasma intake wall configured to receive plasma from a remote plasma source (RPS) and a surrounding wall having an inner surface defining an interior volume for receiving a substrate; and a substrate support having a substrate supporting surface facing the plasma intake wall and elevatably arranged in the interior volume of the processing chamber. The surrounding wall, in a cross-section of the processing chamber, includes: a first segment having a first width associated with a processing region for the substrate support; a second segment having a width greater than the first width that is further away from the plasma intake wall than the first segment.Type: ApplicationFiled: October 26, 2023Publication date: February 29, 2024Inventors: Yi-Yuan HUANG, Yi-Cheng LIU
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Publication number: 20230398563Abstract: A parallel-type coating apparatus for coating at least one object to be coated carried by a carrier includes a double-layer vacuum chamber having feed and discharge chambers opposite to each other in a Z-direction, and a plurality of process chambers for performing at least a fixed point coating on the at least one object to be coated. The double-layer vacuum chamber and the process chambers are arranged in two juxtaposed rows in a Y-direction transverse to the Z-direction. A feed lifting mechanism is disposed in one of the double-layer vacuum chamber 3 and the process chambers, and includes a feed lifting seat movable in the Z-direction. A plurality of first conveying devices are respectively disposed in the other ones of the process chambers for conveying the carrier. A method for coating a multilayer film on at least one object to be coated carried by a carrier is also disclosed.Type: ApplicationFiled: December 2, 2022Publication date: December 14, 2023Applicant: LINCO TECHNOLOGY CO., LTD.Inventors: Yi-Yuan HUANG, Yi-Cheng LIU
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Publication number: 20230245860Abstract: A diffusing plate includes a plate body including a rectangular hole-configuring region, a plurality of holes arranged in the rectangular hole-configuring region and arranged concentrically to form a first to an N-th rectangular patterns from an inside to an outside sequentially. Scales of the first to the N-th rectangular patterns are incrementally increased, and N is a positive integer. One portion of the holes are located in an area near a center of the rectangular hole-configuring region, another portion of the holes are located in four corner areas of the rectangular hole-configuring region, each of the holes has a diameter, and the diameter of the one portion of the holes is smaller than the diameter of the another portion of the holes.Type: ApplicationFiled: April 12, 2023Publication date: August 3, 2023Inventors: Yi-Yuan HUANG, Cheng-Yu TSAO, Cheng-Sheng LIN, Tsung-Wei CHANG, Yi-Cheng LIU
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Publication number: 20220285132Abstract: A substrate processing apparatus comprises a chamber member that defines an interior volume that has an aspect ratio. The chamber member comprises a pair of laterally opposing inlet walls and a loading port. Each of the pair of laterally opposing inlet walls has an inlet port configured to receive output from a remote plasma source. The loading port is arranged between the pair of inlet walls, configured to allow passage of a substrate into the interior volume.Type: ApplicationFiled: May 31, 2021Publication date: September 8, 2022Inventors: YI-YUAN HUANG, YI-CHENG LIU
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Publication number: 20220254660Abstract: A substrate processing apparatus, comprising: a processing chamber having a plasma intake wall configured to receive plasma from a remote plasma source (RPS) and a surrounding wall having inner surface defining an interior volume for receiving a substrate; and a substrate support having a substrate supporting surface facing the plasma intake wall and elevatably arranged in the interior volume of the processing chamber. The surrounding wall, in a cross-section of the processing chamber, includes: a first segment having a first width associated with a processing region for the substrate support; a second segment having a width greater than the first width that is further away from the plasma intake wall than the first segment.Type: ApplicationFiled: February 5, 2021Publication date: August 11, 2022Inventors: YI-YUAN HUANG, YI-CHENG LIU
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Patent number: 9771649Abstract: A substrate carrier unit includes a substrate carrier and a phase transition material. The substrate carrier defines an isolated space therein. The phase transition material is filled into the isolated space of the substrate carrier and has a melting point ranging between 18° C. and 95° C. The phase transition material is capable of absorbing thermal energy from the substrate carrier as latent heat to change the phase from solid to liquid.Type: GrantFiled: May 5, 2015Date of Patent: September 26, 2017Assignee: Linco Technology Co., Ltd.Inventors: Chung-Yu Yeh, Huei-Chia Su, Cheng-Peng Yeh, Tsung-Wei Chang, Yi-Yuan Huang, Wan-Yu Huang, Mu-Sen Lu
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Patent number: 9611542Abstract: A film deposition system includes a substrate carrier, a film deposition device, a transport device and a cooling device. The substrate carrier includes a carrier body that defines an isolated space therein, and a phase transition material that is filled into the isolated space and that has a melting point ranging between 18° C. and 95° C. The phase transition material is capable of absorbing thermal energy from the carrier body as latent heat to change the phase of the phase transition material from solid to liquid. The cooling device is configured to absorb thermal energy from the substrate carrier so as to change the phase of the phase transition material from liquid to solid.Type: GrantFiled: May 1, 2015Date of Patent: April 4, 2017Assignee: Linco Technology Co., Ltd.Inventors: Cheng-Peng Yeh, Huei-Chia Su, Chung-Yu Yeh, Tsung-Wei Chang, Yi-Yuan Huang, Wan-Yu Huang, Mu-Sen Lu
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Publication number: 20170016110Abstract: A double-valve device includes a base unit, two valve units and a transport unit. The base unit has a surrounding wall, an entrance wall connected to the surrounding wall and formed with an entrance opening, an exit wall connected to the surrounding wall oppositely of the entrance wall and formed with an exit opening, and a spacing wall disposed between the entrance and exit walls and formed with a pass-through opening. The surrounding wall, the entrance wall and the spacing wall cooperatively define a buffer chamber. The surrounding wall, the spacing wall and the exit wall cooperatively define a joint chamber. The valve units are respectively disposed in the buffer and joint chambers for respectively sealing and unsealing the entrance and pass-through openings.Type: ApplicationFiled: July 14, 2015Publication date: January 19, 2017Applicant: Linco Technology Co., LTDInventors: Yi-Yuan Huang, Mu-Sen Lu, Wen-Lung Chen
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Publication number: 20160326637Abstract: A substrate carrier unit includes a substrate carrier and a phase transition material. The substrate carrier defines an isolated space therein. The phase transition material is filled into the isolated space of the substrate carrier and has a melting point ranging between 18° C. and 95° C. The phase transition material is capable of absorbing thermal energy from the substrate carrier as latent heat to change the phase from solid to liquid.Type: ApplicationFiled: May 5, 2015Publication date: November 10, 2016Inventors: Chung-Yu Yeh, Huei-Chia Su, Cheng-Peng Yeh, Tsung-Wei Chang, Yi-Yuan Huang, Wan-Yu Huang, Mu-Sen Lu
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Patent number: D1018907Type: GrantFiled: November 15, 2021Date of Patent: March 19, 2024Assignee: CHENG UEI PRECISION INDUSTRY CO., LTD.Inventors: Yun-Chien Lee, Yi-Ching Hsu, Pei-Yi Lin, Yu-Hung Su, Sheng-Yuan Huang, Chun-Fu Lin