Abstract: Provided are a preparation and applications of a six-membered fused with six-membered heterocyclic compound, specifically, provided in the present invention is a compound as represented by formula I as follows, where the definitions of the groups are as described in the description. The compound has TRK kinase inhibiting activity and can serve as a pharmaceutical composition for treating TRK dysfunction-related diseases.

Abstract: Example implementations described herein are directed to a simulation environment for a real world system involving one or more robots and one or more sensors. Scenarios are loaded into a simulation environment having one or more virtual robots corresponding to the one or more robots, and one or more virtual sensors corresponding to the one or more virtual system to train a control strategy model from reinforcement learning, which is subsequently deployed to the real world environment. In cases of failure of the real world environment, the failures are provided to the simulation environment to generate an updated control strategy model for the real world environment.

Abstract: A wireless device may receive one or more messages comprising one or more configuration parameters for a cell. The one or more configuration parameters may indicate a sounding reference signal (SRS) resource for a configured uplink grant. An SRS resource set may comprise the SRS resource. The one or more configuration parameters may comprise a parameter that enables using default transmission parameters for SRS transmissions. The one or more configuration parameters may indicate no pathloss reference signal. The wireless device may transmit, with a transmission power determined based on a pathloss reference signal associated with the SRS resource set, a transport block of the configured uplink grant.

Abstract: A display substrate and a mask plate assembly includes a base substrate, a pixel defining layer, a functional layer, a cathode layer, and a covering layer that are sequentially stacked in a direction away from the base substrate, wherein the size of orthographic projection of the functional layer on the base substrate is jointly determined by the size of a display area and a first minimum distance. The first minimum distance is the minimum distance in a direction from the display area to a non-display area and between the boundary of the display area and the boundary of the functional layer, and is determined by a first shadow width of the functional layer extending from the display area to the non-display area. The first shadow width is the maximum width of a shadow area formed within a preset region when the functional layer is vapor deposited in the preset region.

Abstract: A method includes forming a gate dielectric layer on a semiconductor region, and depositing a first aluminum-containing work function layer using a first aluminum-containing precursor. The first aluminum-containing work function layer is over the gate dielectric layer. A second aluminum-containing work function layer is deposited using a second aluminum-containing precursor, which is different from the first aluminum-containing precursor. The second aluminum-containing work function layer is deposited over the first aluminum-containing work function layer. A conductive region is formed over the second aluminum-containing work function layer.

Abstract: Combined coating of a projection screen, comprising light-absorbing coating and reflective coating. The light-absorbing coating comprises 28-32 parts by weight of acrylate, 28-32 parts by weight of reactive diluent, 1-3 parts by weight of photoinitiator, 1-3 parts by weight of black pigment, 20-28 parts by weight of solvent, and 1-5 parts by weight of promoter. The reflective coating comprises 28-32 parts by weight of acrylate, 28-32 parts by weight of reactive diluent, 1-3 parts by weight of photoinitiator, 18-23 parts by weight of aluminum silver powder, 26-32 parts by weight of solvent and 1-5 parts by weight of promoter.

Abstract: The present invention provides an electrode for electrolysis in which a planarized metal substrate having a mesh structure such that the aspect ratio of an individual cross-section of a wire constituting the mesh structure is 120% or greater is used to increase the surface area of a coating layer, thereby increasing adhesion to a membrane and gas trap is reduced to reduce overvoltage.

Abstract: The compounds disclosed herein (e.g., compounds of Formula (I), (II), (III), and (IV)) comprise a lipid substructure comprising a hydrophobic moiety and a hydrophilic moiety; and two or more polymeric groups (e.g., two or more polyethylene glycol (PEG) groups). The compounds provided herein can be useful for delivery and expression of mRNA and encoded protein, e.g., as a component of liposomal delivery vehicle, and accordingly can be useful for treating various diseases, disorders and conditions, such as those associated with deficiency of one or more proteins.

Abstract: Methods, systems, and devices for wireless communications are described. A user equipment (UE) may receive a configuration signal indicating a codebook construction configuration for constructing a codebook of sequences for conveying a first type of uplink payload in a resource block that is orthogonal to a second type of uplink payload transmitted from a second UE in the resource block. The UE may construct the codebook of sequences for the first type of uplink payload according to the codebook construction configuration. The UE may generate the first type of uplink payload for transmission using a first sequence from the codebook of sequences. The UE may transmit the first type of uplink payload in the resource block, wherein the first type of uplink payload is multiplexed in the resource block with the second type of uplink payload from the second UE.

Abstract: The present disclosure provides a packaging method, including: providing a first semiconductor substrate; forming a bonding region on the first semiconductor substrate, wherein the bonding region of the first semiconductor substrate includes a first bonding metal layer and a second bonding metal layer; providing a second semiconductor substrate having a bonding region, wherein the bonding region of the second semiconductor substrate includes a third bonding layer; and bonding the first semiconductor substrate to the second semiconductor substrate by bringing the bonding region of the first semiconductor substrate in contact with the bonding region of the second semiconductor substrate; wherein the first and third bonding metal layers include copper (Cu), and the second bonding metal layer includes Tin (Sn). An associated packaging structure is also disclosed.

Abstract: A display device includes a first substrate; a first conductive pattern, a first voltage line and a second voltage line on the first substrate; an insulating layer on the first conductive pattern and the second voltage line; a plurality of first light-emitting elements on the insulating layer; a first electrode on the insulating layer and connected to the first conductive pattern, the first electrode overlapping the first voltage line; and a second electrode on the insulating layer and connected to the second voltage line, wherein the plurality of first light-emitting elements are in contact with the first electrode and the second electrode, and wherein a part of an upper surface of the first electrode that overlaps the first conductive pattern and a part of the upper surface of the first electrode that overlaps the first voltage line are located on the same plane.

Abstract: The disclosure provides methods for creating long oligonucleotide reagents that include barcodes and other element for sequencing library preparation, where the oligonucleotides are created by multiple tiers of ligation of shorter oligos. The disclosed methods work to extend short oligos that are attached to particles, thereby allowing one to create particles that carry large number of long sample preparation oligonucleotides without being required to synthesize those full-length molecules with a polymerase.

Abstract: A touch-controlled display panel comprising: a display screen comprising a displaying region and a non-displaying region surrounding the displaying region; first touch-control electrodes and first touch-control lead wires provided on one side of the display screen, wherein the first touch-control electrodes are insulated and separated from each other and are individually connected to different first touch-control lead wires, and orthographic projections of the first touch-control electrodes and the first touch-control lead wires on the display screen are located within the non-displaying region, and are adjacent to an edge of the display screen; and a driving module connected to all of the first touch-control lead wires and configured for, in response to a touch-and-sliding operation on the touch-controlled display panel by a finger, detecting variations of capacitances corresponding to the first touch-control electrodes and, according to the variations, determining a touch-and-sliding direction and a touch-a

Abstract: A semiconductor package structure includes a substrate having a substrate having a first surface and second surface opposite thereto, wherein the substrate comprises a wiring structure. The structure also has a first semiconductor die disposed on the first surface of the substrate and electrically coupled to the wiring structure, and a second semiconductor die disposed on the first surface and electrically coupled to the wiring structure, wherein the first semiconductor die and the second semiconductor die are arranged in a side-by-side manner. A molding material surrounds the first semiconductor die and the second semiconductor die, wherein the first semiconductor die is separated from the second semiconductor die by the molding material. Finally, an annular frame mounted on the first surface of the substrate, wherein the annular frame surrounds the first semiconductor die and the second semiconductor die.

Abstract: A technique for semiconductor manufacturing is provided. The technique includes the operations as follows. A semiconductor structure having a first material and a second material is revived. The first material has a first incubation time to a first etching chemistry. The second material has a second incubation time to the first etching chemistry. The first incubation time is shorter than the second incubation time. A first main etch to the semiconductor structure for a first duration by the first etching chemistry is performed. The first duration is greater than the first incubation time and shorter than the second incubation time.

Abstract: Instruction cache behavior and branch prediction are used to improve the functionality of a computing device by profiling branching instructions in an instruction cache to identify likelihoods of proceeding to a plurality of targets from the branching instructions; identifying a hot path in the instruction cache based on the identified likelihoods; and rearranging the plurality of targets relative to one another and associated branching instructions so that a first branching instruction that has a higher likelihood of proceeding to a first hot target than to a first cold target and that previously flowed to the first cold target and jumped to the first hot target instead flows to the first hot target and jumps to the first cold target.

Abstract: A mask includes a first mask that includes a first long side that extends in a first direction and a first short side that extends in a second direction that crosses the first direction and that includes a first edge portion, a first center portion, and a first welded portion, that are sequentially arranged in the first direction. The mask further includes a second mask that includes a second long side that extends in the first direction and a second short side that extends in the second direction and that includes a second welded portion, a second center portion, and a second edge portion, that are sequentially arranged in the first direction. The first welded portion is in contact with the second welded portion.

Abstract: A full spectrum white light emitting device comprising: a broadband solid-state excitation source operable to generate broadband blue excitation light; and at least one photoluminescence material which generates green to red light, wherein the device generates white light whose intensity over the blue to cyan region of the spectrum has a maximum percentage deviation from the intensity of light of a black-body or CIE Standard Illuminant D of less than 50%.

Abstract: A method of forming a wafer-bonding structure includes a wafer-bonding step, a through silicon via (TSV) forming step, and a forming bonding pad step. In the wafer-bonding step, at least two wafers are corresponding to and bonded to each other by bonding surfaces thereof. In the TSV forming step, a TSV structure is formed on at least one side of a seal ring structure of one of the wafers, a conductive filler is disposed in the TSV structure, and the TSV structure is overlapped the side of one of the seal ring structure of one of the wafers and a portion of a seal ring structure of another one of the wafers. In the forming bonding pad step, a bonding pad is formed on an outer surface which is relative to the bonding surface of the wafer with the TSV structure, so as to form the wafer-bonding structure.

Abstract: A micro device includes an epitaxial structure, an overcoat layer, and a first light-guiding structure. The epitaxial structure has a top surface and a bottom surface opposite to each other and a peripheral surface connecting the top surface and the bottom surface. The insulating layer covers at least the bottom surface and part of the peripheral surface of the epitaxial structure. The overcoat layer includes a contact portion and an extension portion. The contact portion conformally covers the insulating layer and the peripheral surface and the bottom surface of the epitaxial structure, and the extension portion connects the contact portion and extends in a direction away from the peripheral surface. The display apparatus includes a circuit substrate and a plurality of the above-mentioned micro devices. The micro devices are disposed and are correspondingly electrically connected to the first pads and the second pads of circuit substrate.