Abstract: A ferroelectric memory includes at least one storage cell. Each storage cell includes a transistor, a first ferroelectric capacitor, and at least one voltage divider capacitor. The transistor includes a gate electrode, a source electrode, and a drain electrode. One electrode of the first ferroelectric capacitor is connected to the gate electrode. The other electrode of the first ferroelectric capacitor is connected to a word line. One electrode of each voltage divider capacitor in the at least one voltage divider capacitor is connected to the gate electrode, and the other electrode of each voltage divider capacitor in the at least one voltage divider capacitor is connected to the source electrode.

Abstract: Example ferroelectric memories and storage devices are described One example ferroelectric memory includes at least one bit cell. A bit cell in the at least one bit cell includes a plurality of ferroelectric capacitors and a first transistor. The first transistor includes a first gate, a first channel, a first source, and a first drain. The first source and the first drain are located at two ends of the first channel. One electrode of each of the plurality of ferroelectric capacitors is formed on the first gate.

Abstract: The present invention discloses an organic resistive random access memory and a preparation method thereof. The memory uses silicon as a substrate, and has a MIM capacitor structure having a vertical memory unit, where the MIM structure has a top electrode of Al, a bottom electrode of ITO, and an middle functional layer of parylene, wherein, a parylene layer as the functional layer is formed by performing deposition multiple times, where the deposition of Al2O3 is performed once by ALD between each two deposition of parylene. A critical region which is in favor of forming a conductive channel could be formed by controlling the deposition area of Al2O3, and further control the electrical characteristics of the memory. Through the present invention, the cycle-to-cycle and device-to-device uniformity could be effectively improved, without changing the basic structure of the memory.

Abstract: Disclosed are a multi-value nonvolatile organic resistive random access memory and a method for preparing the same. The resistive random access memory comprises a top electrode, a bottom electrode and a middle functional layer located between the top electrode and the bottom electrode, the middle functional layer is at least two layers of parylene. The method comprises the steps of: growing material for the bottom electrode using physical vapor deposition method on a substrate; growing sequentially multiple layers of parylene on the bottom electrode by polymer chemical vapor deposition; defining the via for leading out the bottom electrode by lithography and etching; growing material for the top electrode on the parylene materials by using physical vapor deposition process, defining the top electrode material by lithography and lift-off, and leading out the bottom electrode.

Abstract: The present invention discloses a time correlation learning neuron circuit based on a resistive memristor and an implementation method thereof. The present invention utilizes switching characteristics of the resistive memristor. When two terminals of the resistive memristor are selected synchronously by two excitation signals, the voltage drop between these two terminals will change the resistance value of memristor, thereby achieving the on-off of a synapse connection and achieving the correction of the two excitation signals. Meanwhile the device also has a memory characteristic. Also, the previous excitation signal can be repeated. That is, the purpose of learning is achieved. Since the resistive memristor has a simple structure and a high degree of integration, it can achieve large-scale physical synapse connection in order to achieve more complex learning and even logic functions. The present invention has a good application prospect in a neuron cell computation.

Abstract: Embodiments of the present invention disclose a resistive memory and a method for fabricating the same. The resistive memory comprises a bottom electrode, a resistive layer and a top electrode. The resistive layer is located over the bottom electrode. The top electrode is located over the resistive layer. A conductive protrusion is provided on the bottom electrode. The conductive protrusion is embedded in the resistive layer, and has a top width smaller than a bottom width. Embodiments of the present invention further disclose a method for fabricating a resistive memory. According to the resistive memory and the method for fabricating the same provided by the embodiments of the present invention, by means of providing the conductive protrusion on the bottom electrode, a “lightning rod” effect may be occurred so that an electric field in the resistive layer is intensively distributed near the conductive protrusion.

Abstract: The present invention discloses an organic resistive random access memory and a preparation method thereof. The memory uses silicon as a substrate, and has a MIM capacitor structure having a vertical memory unit, where the MIM structure has a top electrode of Al, a bottom electrode of ITO, and an middle functional layer of parylene, wherein, a parylene layer as the functional layer is formed by performing deposition multiple times, where the deposition of Al2O3 is performed once by ALD between each two deposition of parylene. A critical region which is in favor of forming a conductive channel could be formed by controlling the deposition area of Al2O3, and further control the electrical characteristics of the memory. Through the present invention, the cycle-to-cycle and device-to-device uniformity could be effectively improved, without changing the basic structure of the memory.

Abstract: Embodiments of the present invention disclose a resistive memory and a method for fabricating the same. The resistive memory comprises a bottom electrode, a resistive layer and a top electrode. The resistive layer is located over the bottom electrode. The top electrode is located over the resistive layer. A conductive protrusion is provided on the bottom electrode. The conductive protrusion is embedded in the resistive layer, and has a top width smaller than a bottom width. Embodiments of the present invention further disclose a method for fabricating a resistive memory. According to the resistive memory and the method for fabricating the same provided by the embodiments of the present invention, by means of providing the conductive protrusion on the bottom electrode, a “lightning rod” effect may be occurred so that an electric field in the resistive layer is intensively distributed near the conductive protrusion.