Abstract: An apparatus and method for cancelling leakage interference of phased array antenna based on microwave photonic. The apparatus consists of a signal generation unit, a splitter, a beaming unit, a transmitting antenna, a receiving antenna, a microwave photonic channel construction array, a control unit, a combiner array, and a signal receiving unit. The receiving antennas are divided into several receiving subarrays, and the microwave photonic channel construction unit corresponds to each receiving subarray, respectively. For each receiving subarray, a reference channel is constructed by adjusting the array of amplitude adjustment unit, the array of time delay adjustment unit, and the array of phase adjustment unit in the microwave photonic channel construction array. Thus, the reference channel has the matched delay, equal amplitude response, and opposite phase response relative to the leakage interference channel, based on which the leakage interference of phased array antenna is cancelled.

Abstract: A semiconductor structure can include: a semiconductor substrate having a first region, a second region, and an isolation region disposed between the first region and the second region; an isolation component located in the isolation region; and where the isolation component is configured to recombine first carriers flowing from the first region toward the second region, and to extract second carriers flowing from the second region toward the first region.

Abstract: A semiconductor device having an LDMOS transistor can include: a first deep well region having a first doping type; a drift region located in the first deep well region and having a second doping type; and a drain region located in the drift region and having the second doping type, where the second doping type is opposite to the first doping type, and where a doping concentration peak of the first deep well region is located below the drift region to optimize the breakdown voltage and the on-resistance of the LDMOS transistor.

Abstract: A semiconductor device can include: a substrate having a first doping type; a first well region located in the substrate and having a second doping type, where the first well region is located at opposite sides of a first region of the substrate; a source region and a drain region located in the first region, where the source region has the second doping type, and the drain region has the second doping type; and a buried layer having the second doping type located in the substrate and below the first region, where the buried layer is in contact with the first well region, where the first region is surrounded by the buried layer and the first well region, and the first doping type is opposite to the second doping type.

Abstract: A semiconductor device having an LDMOS transistor can include: a first deep well region having a first doping type; a drift region located in the first deep well region and having a second doping type; and a drain region located in the drift region and having the second doping type, where the second doping type is opposite to the first doping type, and where a doping concentration peak of the first deep well region is located below the drift region to optimize the breakdown voltage and the on-resistance of the LDMOS transistor.

Abstract: A terminal structure of a bidirectional switching device, where the terminal structure can include: a field plate located on a top surface of a well region and between a first voltage-withstand region and a second voltage-withstand region, where the bidirectional switching device comprises the well region, and the first and second voltage-withstand regions located in the well region; and where a potential is connected to the field plate, in order to decrease an electrical leakage of a parasitic transistor, where the parasitic transistor is formed by the first voltage-withstand region, the well region, and the second voltage-withstand region.

Abstract: A laterally diffused metal oxide semiconductor structure can include: a base layer; a source region and a drain region located in the base layer; first dielectric layer located on a top surface of the base layer and adjacent to the source region; a voltage withstanding layer located on the top surface of the base layer and located between the first dielectric layer and the drain region; a first conductor at least partially located on the first dielectric layer; and a second conductor at least partially located on the voltage withstanding layer, where the first and second conductors are spatially isolated, and a juncture region of the first dielectric layer and the voltage withstanding layer is covered by one of the first and second conductors.

Abstract: A laterally diffused metal oxide semiconductor device can include: a well region having a second doping type; a reduced surface field effect layer of a first doping type formed by an implantation process in a predetermined region of the well region, where a length of the reduced surface field effect layer is less than a length of the well region; a body region of the first doping type extending from a top surface of the well region into the well region; a drain portion of the second doping type extending from the top surface of the well region into the well region; and an insulating structure located between the body region and the drain portion, at least a portion of the insulating structure is located on the top surface of the well region.

Abstract: A laterally diffused metal oxide semiconductor device can include: a base layer; a source region and a drain region located in the base layer; a first dielectric layer located on a top surface of the base layer and adjacent to the source region; a voltage withstanding layer located on the top surface of the base layer and located between the first dielectric layer and the drain region; a first conductor at least partially located on the first dielectric layer; a second conductor at least partially located on the voltage withstanding layer; and a source electrode electrically connected to the source region, where the first and second conductors are spatially isolated, and the source electrode at least covers a space between the first and second conductors.

Abstract: A semiconductor device can include: a substrate having a first doping type; a first well region located in the substrate and having a second doping type, where the first well region is located at opposite sides of a first region of the substrate; a source region and a drain region located in the first region, where the source region has the second doping type, and the drain region has the second doping type; and a buried layer having the second doping type located in the substrate and below the first region, where the buried layer is incontact with the first well region, where the first region is surrounded by the buried layer and the first well region, and the first doping type is opposite to the second doping type.

Abstract: A semiconductor device can include: a substrate having a first doping type; a first well region located in the substrate and having a second doping type, where the first well region is located at opposite sides of a first region of the substrate; a source region and a drain region located in the first region, where the source region has the second doping type, and the drain region has the second doping type; and a buried layer having the second doping type located in the substrate and below the first region, where the buried layer is incontact with the first well region, where the first region is surrounded by the buried layer and the first well region, and the first doping type is opposite to the second doping type.

Abstract: A semiconductor structure can include: a semiconductor substrate having a first region, a second region, and an isolation region disposed between the first region and the second region; an isolation component located in the isolation region; and where the isolation component is configured to recombine first carriers flowing from the first region toward the second region, and to extract second carriers flowing from the second region toward the first region.

Abstract: An electrode structure can include: a semiconductor substrate; a trench extending from an upper surface of the semiconductor substrate into the semiconductor substrate; a contact region extending from the upper surface of the semiconductor substrate into the semiconductor substrate; and filling material in the trench, wherein the contact area is in contact with outer sidewalls of the trench.

Abstract: A semiconductor structure can include: a semiconductor substrate having a first region, a second region, and an isolation region disposed between the first region and the second region; an isolation component located in the isolation region; and where the isolation component is configured to recombine first carriers flowing from the first region toward the second region, and to extract second carriers flowing from the second region toward the first region.

Abstract: A semiconductor structure can include: a semiconductor substrate having a first region, a second region, and an isolation region disposed between the first region and the second region; an isolation component located in the isolation region; and where the isolation component is configured to recombine first carriers flowing from the first region toward the second region, and to extract second carriers flowing from the second region toward the first region.

Abstract: A vehicle crossmember is made from continuous fiber-reinforced polymeric material without the need for metallic structural reinforcements. The crossmember includes more than one fiber-reinforced material composition, including different amounts and/or types of fiber reinforcements along different lengthwise portions of a crossbar of the crossmember. Attachment points and stiffening ribs can be overmolded onto surfaces of the crossbar before assembling two halves of the crossbar together to form the crossmember.

Abstract: A method for manufacturing a laterally diffused metal oxide semiconductor device and a semiconductor device are provided. A body region is formed before forming a gate dielectric layer and a gate conductor, thereby reducing a channel length of the semiconductor device, thus reducing the on-resistance. In addition, a drift region serves as both a region withstanding a high voltage and a diffusion suppression region for suppressing lateral diffusion of the body region, thereby further reducing the channel length of the semiconductor device, thus manufacturing a short-channel semiconductor device.

Abstract: A laterally diffused metal oxide semiconductor device can include: a base layer; a source region and a drain region located in the base layer; a first dielectric layer located on a top surface of the base layer and adjacent to the source region; a voltage withstanding layer located on the top surface of the base layer and located between the first dielectric layer and the drain region; a first conductor at least partially located on the first dielectric layer; a second conductor at least partially located on the voltage withstanding layer; and a source electrode electrically connected to the source region, where the first and second conductors are spatially isolated, and the source electrode at least covers a space between the first and second conductors.

Abstract: A laterally diffused metal oxide semiconductor device can include: a base layer; a source region and a drain region located in the base layer; a first dielectric layer located on a top surface of the base layer and adjacent to the source region; a voltage withstanding layer located on the top surface of the base layer and located between the first dielectric layer and the drain region; a first conductor at least partially located on the first dielectric layer; a second conductor at least partially located on the voltage withstanding layer; and a source electrode electrically connected to the source region, where the first and second conductors are spatially isolated, and the source electrode at least covers a space between the first and second conductors.

Abstract: A semiconductor device can include: a substrate having a first doping type; a first well region located in the substrate and having a second doping type, where the first well region is located at opposite sides of a first region of the substrate; a source region and a drain region located in the first region, where the source region has the second doping type, and the drain region has the second doping type; and a buried layer having the second doping type located in the substrate and below the first region, where the buried layer is incontact with the first well region, where the first region is surrounded by the buried layer and the first well region, and the first doping type is opposite to the second doping type.