Abstract: Generating instructions for programming a processing element array to implement a convolution operation can include determining that the convolution operation under-utilizes the processing element array. The convolution operation involves using the processing element array to perform a series of matrix multiplications between a set of filters and a set of input matrices. Each filter comprises a weight matrix. Each input matrix is assigned to a respective row in the processing element array. Under-utilization can be determined through detecting that less than a threshold number of rows would be used concurrently. In response to determining that the convolution operation under-utilizes the processing element array, instructions can be added for modifying the convolution operation to increase the number of rows used concurrently. The added instructions are executable to cause at least one input matrix to be processed in parallel across more rows compared to processing without modifying the convolution operation.

Abstract: A method of generating executable instructions for a computing system is provided. The method comprises: receiving a first set of instructions including a kernel of a first operator and a kernel of a second operator, the kernel of the first operator including instructions of the first operator and write instructions to a virtual data node, the kernel of the second operator including instructions of the second operator and read instructions to the virtual data node; determining, based on a mapping between the write instructions and read instructions, instructions of data transfer operations between the first operator and the second operator; and generating a second set of instructions representing a fused operator of the first operator and the second operator, the second set of instructions including the instructions of the first operator, the instructions of the second operator, and the instructions of the data transfer operations.

Abstract: Techniques for optimizing and deploying convolutional neural network (CNN) machine learning models for inference using integrated graphics processing units are described. A model compilation system optimizes CNN models using optimized vision-specific operators as well as both graph-level tuning and tensor-level tuning to explore the optimization space for achieving heightened performance. The model compilation system may also implement a heuristic-based two-stage technique for falling back certain operators of CNN models to use CPUs when needed or otherwise beneficial.

Abstract: A computer-implemented method includes receiving a neural network model for implementation using a processing element array, where the neural network model includes a convolution operation on a set of input feature maps and a set of filters. The method also includes determining, based on the neural network model, that the convolution operation utilizes less than a threshold number of rows in the processing element array for applying a set of filter elements to the set of input feature maps, where the set of filter elements includes one filter element in each filter of the set of filters. The method further includes generating, for the convolution operation and based on the neural network model, a first instruction and a second instruction for execution by respective rows in the processing element array, where the first instruction and the second instruction use different filter elements of a filter in the set of filters.

Abstract: Methods and apparatuses for hierarchical partitioning of operators of a neural network for execution on an acceleration engine are provided. Neural networks are built in machine learning frameworks using neural network operators. The neural network operators are compiled into executable code for the acceleration engine. Development of new framework-level operators can exceed the capability to map the newly developed framework-level operators onto the acceleration engine. To enable neural networks to be executed on an acceleration engine, hierarchical partitioning can be used to partition the operators of the neural network. The hierarchical partitioning can identify operators that are supported by a compiler for execution on the acceleration engine, operators to be compiled for execution on a host processor, and operators to be executed on the machine learning framework.

Abstract: A computer-implemented method includes receiving a neural network model for implementation using a processing element array, where the neural network model includes a convolution operation on a set of input feature maps and a set of filters. The method also includes determining, based on the neural network model, that the convolution operation utilizes less than a threshold number of rows in the processing element array for applying a set of filter elements to the set of input feature maps, where the set of filter elements includes one filter element in each filter of the set of filters. The method further includes generating, for the convolution operation and based on the neural network model, a first instruction and a second instruction for execution by respective rows in the processing element array, where the first instruction and the second instruction use different filter elements of a filter in the set of filters.

Abstract: Systems and methods are disclosed for displaying data on a display device. An example method of displaying data on a display device includes computing a texture based on a difference between a high quality (HQ) tile and a corresponding low quality (LQ) tile. The method also includes storing the texture into an alpha channel of the LQ tile. The method further includes compositing the LQ tile onto the display device when an attribute of the alpha channel satisfies a threshold.

Abstract: A method and device for rasterizing content includes partitioning a webpage into webpage tiles that are associated with a front buffer and a back buffer. A rasterized version of each of the tiles may be stored in the associated front buffer, and each may include new content. If a previous copy of the at least one tile is found in memory, the new content is rasterized onto the previous copy. If a previous copy is not found, and if the proportion of the new content of the at least one tile is less than a threshold, the new content is rasterized onto the front buffer. If the proportion of the new content is above the threshold, and if unchanged content in the at least one tile is complex, then the unchanged content is copied to the back buffer and the new content is rasterized onto the associated back buffer.

Abstract: In graphics rendering, a texture tile is divided into a plurality of partitions, each partition having a plurality of vertices. A map indicates, for each partition, whether each partition comprises a constant color. Then the plurality of vertices are transferred to a vertex shader, which determines that at least one of the partitions comprises a constant color partition. A vertex shader applies a vertex transformation that associates a set of texel coordinates from the texture tile to each of the vertices of the constant color partition to generate a set of associated texel coordinates. A first coordinate of the set of associated texel coordinates is set to zero. A pixel shader interpolates the associated texel coordinates to generate an interpolated value and accesses a single texel in the constant color partition that corresponds to the interpolated value.

Abstract: An example method of providing a solid texture map to a graphics processing unit (GPU) includes dividing a tile of renderable content into a plurality of partitions. The method also includes determining that a set of partitions of the plurality of partitions is a solid color. The method further includes generating a solid texture map indicating that the set of partitions of the plurality of partitions is a solid color. The method also includes providing access to the solid texture map to a GPU.

Abstract: Systems and methods are disclosed for displaying data on a display device. An example method of displaying data on a display device includes computing a texture based on a difference between a high quality (HQ) tile and a corresponding low quality (LQ) tile. The method also includes storing the texture into an alpha channel of the LQ tile. The method further includes compositing the LQ tile onto the display device when an attribute of the alpha channel satisfies a threshold.

Abstract: In graphics rendering, a texture tile is divided into a plurality of partitions, each partition having a plurality of vertices. A map indicates, for each partition, whether each partition comprises a constant color. Then the plurality of vertices are transferred to a vertex shader, which determines that at least one of the partitions comprises a constant color partition. A vertex shader applies a vertex transformation that associates a set of texel coordinates from the texture tile to each of the vertices of the constant color partition to generate a set of associated texel coordinates. A first coordinate of the set of associated texel coordinates is set to zero. A pixel shader interpolates the associated texel coordinates to generate an interpolated value and accesses a single texel in the constant color partition that corresponds to the interpolated value.

Abstract: A method and device for rasterizing content includes partitioning a webpage into webpage tiles that are associated with a front buffer and a back buffer. A rasterized version of each of the tiles may be stored in the associated front buffer, and each may include new content. If a previous copy of the at least one tile is found in memory, the new content is rasterized onto the previous copy. If a previous copy is not found, and if the proportion of the new content of the at least one tile is less than a threshold, the new content is rasterized onto the front buffer. If the proportion of the new content is above the threshold, and if unchanged content in the at least one tile is complex, then the unchanged content is copied to the back buffer and the new content is rasterized onto the associated back buffer.

Abstract: An example method of providing a solid texture map to a graphics processing unit (GPU) includes dividing a tile of renderable content into a plurality of partitions. The method also includes determining that a set of partitions of the plurality of partitions is a solid color. The method further includes generating a solid texture map indicating that the set of partitions of the plurality of partitions is a solid color. The method also includes providing access to the solid texture map to a GPU.