Patents by Inventor Yidi Liu

Yidi Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10581460
    Abstract: A QC-LDPC decoder includes: a zero matrix monitoring circuit, configured to monitor whether a submatrix of a check matrix of QC-LDPC coding information is a zero matrix; a check node processing circuit, configured to calculate check message of the check node by using the check matrix according to variable message of a variable node if the submatrix is not a zero matrix; a variable node processing circuit, configured to update the variable message of the variable node according to the check message returned by the check node if the submatrix is not a zero matrix; and a check circuit, configured to determine whether the variable message satisfies a check standard or not.
    Type: Grant
    Filed: August 31, 2018
    Date of Patent: March 3, 2020
    Assignee: SMARTECH WORLDWIDE LIMITED
    Inventor: Yidi Liu
  • Publication number: 20200044668
    Abstract: A LDPC decoder includes: a coded information receiving circuit, configured to receive coded information and initialize bit information of a variable node; a check node processing circuit, configured to receive first reliability information, and perform check node processing and output second reliability information; a variable node processing circuit, configured to receive the second reliability information, and perform variable node processing to update the bit information of the variable node; a decoding decision circuit, configured to perform a decoding decision for the bit information of the variable node; and a scaling circuit configured to scale the first reliability information transmitted, the second reliability information and the bit information of the variable node.
    Type: Application
    Filed: October 23, 2018
    Publication date: February 6, 2020
    Inventor: Yidi Liu
  • Publication number: 20200014402
    Abstract: A QC-LDPC decoder includes: a zero matrix monitoring circuit, configured to monitor whether a submatrix of a check matrix of QC-LDPC coding information is a zero matrix; a check node processing circuit, configured to calculate check message of the check node by using the check matrix according to variable message of a variable node if the submatrix is not a zero matrix; a variable node processing circuit, configured to update the variable message of the variable node according to the check message returned by the check node if the submatrix is not a zero matrix; and a check circuit, configured to determine whether the variable message satisfies a check standard or not.
    Type: Application
    Filed: August 31, 2018
    Publication date: January 9, 2020
    Inventor: Yidi Liu