Patents by Inventor Yidong YUAN

Yidong YUAN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Ultra-low power consumption power supply structure
    Patent number: 10866605
    Abstract: An ultra-low power consumption power supply structure, comprising: a first LDO circuit, a second LDO circuit, a first Bandgap module, a second Bandgap module and a switching circuit, wherein the first LDO circuit is used for providing an LDO output voltage when an SOC chip is in a normal operating mode, and the second LDO circuit is used for providing an LDO output voltage when the SOC chip is in an ultra-low power consumption mode; the first Bandgap module is used for providing, based on a main power supply voltage, a first reference voltage for the first LDO circuit at the time of power-on startup, and the second Bandgap module is used for providing a second reference voltage for the second LDO circuit after power-on startup is completed; and the switching circuit is used for switching the mode in which the first reference voltage is output by the first Bandgap module at the time of power-on startup to the mode in which the second reference voltage is output by the second Bandgap module after power-on start
    Type: Grant
    Filed: May 22, 2018
    Date of Patent: December 15, 2020
    Assignee: Beijing Smartchip Microelectronics Technology Comp
    Inventors: Dongyan Zhao, Xiaoke Tang, Xiaoman Wang, Dejian Li, Haifeng Zhang, Yi Hu, Lixin Yang, Yidong Yuan, Lang Tan, Yongwang Ma, Jiali Hou
  • ULTRA-LOW POWER CONSUMPTION POWER SUPPLY STRUCTURE
    Publication number: 20200326739
    Abstract: An ultra-low power consumption power supply structure, comprising: a first LDO circuit, a second LDO circuit, a first Bandgap module, a second Bandgap module and a switching circuit, wherein the first LDO circuit is used for providing an LDO output voltage when an SOC chip is in a normal operating mode, and the second LDO circuit is used for providing an LDO output voltage when the SOC chip is in an ultra-low power consumption mode; the first Bandgap module is used for providing, based on a main power supply voltage, a first reference voltage for the first LDO circuit at the time of power-on startup, and the second Bandgap module is used for providing a second reference voltage for the second LDO circuit after power-on startup is completed; and the switching circuit is used for switching the mode in which the first reference voltage is output by the first Bandgap module at the time of power-on startup to the mode in which the second reference voltage is output by the second Bandgap module after power-on start
    Type: Application
    Filed: May 22, 2018
    Publication date: October 15, 2020
    Inventors: Dongyan ZHAO, Xiaoke TANG, Xiaoman WANG, Dejian LI, Haifeng ZHANG, Yi HU, Lixin YANG, Yidong YUAN, Lang TAN, Yongwang MA, Jiali HOU