Abstract: An imaging assembly for a spectrometer includes a substrate with first and second modules thereon containing respective arrays of detector elements positioned so the arrays are elongated along a first axis with a gap therebetween. A third module including a third array of detector elements is also thereon, spaced from the first axis, at least as long as the gap, and smaller than the elongation of either of the first or second arrays. Further thereon are first and second slits elongated along a second axis spaced from and generally parallel to the first axis, each being at least as long as the respective arrays. A third slit at least as long as the gap is also therein, spaced from the first axis, second axis, and third array such that the gap, third slit, and third array are generally along a third axis generally perpendicular to the first and second axis.

Abstract: An imaging assembly for a spectrometer includes a substrate with first and second modules thereon containing respective arrays of detector elements positioned so the arrays are elongated along a first axis with a gap therebetween. A third module including a third array of detector elements is also thereon, spaced from the first axis, at least as long as the gap, and smaller than the elongation of either of the first or second arrays. Further thereon are first and second slits elongated along a second axis spaced from and generally parallel to the first axis, each being at least as long as the respective arrays. A third slit at least as long as the gap is also therein, spaced from the first axis, second axis, and third array such that the gap, third slit, and third array are generally along a third axis generally perpendicular to the first and second axis.

Abstract: A pyroelectric focal plane array useful for thermal imaging applications comprises a detector (10), comprises a reticulated and aluminized pyroelectric chip (12) interfaced with a signal processor chip (14) by thermally insulating bumps (30) coated with a thin conductive layer (38) to form a plurality of thermally insulative and electronically conductive interconnections (16) between detector chips (12) and processor chip (14).