Abstract: An electronic device includes a first substrate structure, multiple electronic elements and a second substrate structure. The first substrate structure includes a first substrate. The electronic elements are disposed on the first substrate. The second substrate structure is coupled to the first substrate structure. The second substrate structure includes a second substrate, a protection circuit, a driving circuit and a bonding pad. The protection circuit is disposed on the second substrate. The driving circuit is disposed on the second substrate and configured to drive at least a part of the electronic elements. The bonding pad is disposed on the second substrate. The protection circuit is respectively coupled to the bonding pad and the driving circuit. The electronic device may reduce the damage caused by electrostatic discharge or reduce the impact of the bonding process of the bonding pad on signal conduction.

Abstract: A compound carrier board structure of Flip-Chip Chip-Scale Package and manufacturing method thereof provides a baseplate with an opening bonded to a carrier board in order to form a compound carrier board structure. A die is placed in the opening and bonded to the carrier board. A sealant is filled in a gap between surrounding walls of the opening and the die at a height lower than the die to fixedly place the die within the opening and to leave a non-active surface of the die exposed.

Abstract: A compound carrier board structure of Flip-Chip Chip-Scale Package and manufacturing method thereof provides a baseplate with an opening bonded to a carrier board in order to form a compound carrier board structure. A die is placed in the opening and bonded to the carrier board. A sealant is filled in a gap between surrounding walls of the opening and the die at a height lower than the die to fixedly place the die within the opening and to leave a non-active surface of the die exposed.

Abstract: A compound carrier board structure of Flip-Chip Chip-Scale Package and manufacturing method thereof provides a baseplate with a penetrating rectangular opening bonded to a non-conductive film then a carrier board in order to form a compound carrier board structure. The baseplate is constructed with a low Thermal Expansion Coefficient material.

Abstract: A method for manufacturing a circuit board with a buried element having high density pin count, wherein a micro copper window formed in a first circuit by patterned dry film electroplating is easily controlled less than 50 ?m so that the micro conduction holes formed after the laser drilling each has a diameter greatly shrunk less than 50 ?m so as to highly increase density of the micro conduction holes, thereby facilitating in burial of the buried element with the high density pin count. Additionally, by disposing the micro conduction holes in the same elevation, optically aligning a fixing position for the buried element can be controlled precisely.

Abstract: A method for manufacturing a circuit board with a buried element having high density pin count, wherein a micro copper window formed in a first circuit by patterned dry film electroplating is easily controlled less than 50 ?m so that the micro conduction holes formed after the laser drilling each has a diameter greatly shrunk less than 50 ?m so as to highly increase density of the micro conduction holes, thereby facilitating in burial of the buried element with the high density pin count. Additionally, by disposing the micro conduction holes in the same elevation, optically aligning a fixing position for the buried element can be controlled precisely.

Abstract: A compound carrier board structure of Flip-Chip Chip-Scale Package and manufacturing method thereof provides a baseplate having a flip region with a through-opening and bonding to a Non-conductive Film to bond to a carrier board in order to form a compound carrier board structure. The baseplate is constructed with a low Thermal Expansion Coefficient material.

Abstract: A compound carrier board structure of Flip-Chip Chip-Scale Package and manufacturing method thereof provides a baseplate with a penetrating rectangular opening bonded to a non-conductive film then a carrier board in order to form a compound carrier board structure. The baseplate is constructed with a low Thermal Expansion Coefficient material.

Abstract: A method for manufacturing microthrough-hole includes electroplating a metal layer on a carrier plate, patterning the metal layer to form a first circuit having copper pads, covering the first circuit with a photoresist layer and not covering the copper window between two of the copper pads, etching the metal layer beneath the copper window and removing the photoresist layer, sequentially forming an insulation layer and a second circuit on the first circuit and the copper window, the second circuit layer having a stop pad corresponding to the copper window, removing the carrier plate, upward drilling through the insulation layer between the stop pad and the copper window to form a microthrough-hole beneath the stop pad, and forming a conductive layer in the microthrough-hole to form the microthrough-hole connecting the first and second circuits. The microthrough-hole and its occupied area is greatly reduced, thereby achieving high circuit density.

Abstract: A compound carrier board structure of Flip-Chip Chip-Scale Package and manufacturing method thereof provides a baseplate having a flip region with a through-opening and bonding to a Non-conductive Film to bond to a carrier board in order to form a compound carrier board structure. Therefore, when a die is planted in the film region of the carrier board structure, the carrier board is able to susceptible to different stresses during a package process. The baseplate uses the low Thermal Expansion Coefficient material to avoid warpage problems caused by the thermal expansion of the carrier board resulting from the thermal stresses. The carrier board is able to disperse conduction of thermal stresses by the baseplate in order to strengthen cooling effect of the compound carrier board structure. Thus, the present invention achieves miniaturization and heat strengthening and enhances the mechanical strength.

Abstract: A method for fabricating a carrier board having no conduction line is provided. The fabricating method includes: providing a support plate having a detachable metal layer; providing a plating current via the support plate and the detachable metal layer to plate on the detachable metal layer to in sequence configure an etching resist layer and a plating metal layer; and then gradually completing other circuit layers by a compression laminating process with the support plate providing the plating current. After the entire plating process has been completed, the support plate and the detachable metal layer are removed.