Patents by Inventor Yifang Cao

Yifang Cao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230238590
    Abstract: A battery protection board includes a first circuit board, a second circuit board, and a tab connecting portion. The first circuit board includes a first substrate, electronic components and an insulation layer. The first substrate includes a first surface and a second surface opposite to each other. The electronic components are disposed on the first surface and the insulation layer covers the electronic components on the first surface. The second circuit board includes a second substrate. The second substrate includes a third surface and a fourth surface opposite to each other. The third surface is connected with the second surface. The tab connecting portion is disposed on the fourth surface. The first substrate has sufficient space reserved for welding the second substrate improving reliability of connection between the first and the second circuit boards, optimizing spatial layout of the battery protection board and ensuring versatility of first circuit board.
    Type: Application
    Filed: March 30, 2023
    Publication date: July 27, 2023
    Applicant: Dongguan NVT Technology Limited
    Inventors: Yifang Cao, Yabin Zhao, Yanting Zhang, Yumei Liang
  • Patent number: 7964439
    Abstract: The invention provides a method of depositing a layer of a conductive material, e.g. metal, metal oxide or electroconductive polymer, from a patterned stamp, preferably a soft, elastomeric stamp, to a substrate after an organic layer has been transferred from a patterned stamp to an organic layer over the substrate. The patterned metal or organic layer may be used for example, in a wide range of electronic devices. The present methods are particularly suitable for nanoscale patterning of organic electronic components.
    Type: Grant
    Filed: November 3, 2004
    Date of Patent: June 21, 2011
    Assignee: The Trustees of Princeton University
    Inventors: Changsoon Kim, Yifang Cao, Winston O. Soboyejo, Stephen Forrest
  • Publication number: 20050170621
    Abstract: The invention provides a method of depositing a layer of a conductive material, e.g. metal, metal oxide or electroconductive polymer, from a patterned stamp, preferably a soft, elastomeric stamp, to a substrate after an organic layer has been transferred from a patterned stamp to an organic layer over the substrate. The patterned metal or organic layer may be used for example, in a wide range of electronic devices. The present methods are particularly suitable for nanoscale patterning of organic electronic components.
    Type: Application
    Filed: November 3, 2004
    Publication date: August 4, 2005
    Inventors: Changsoon Kim, Yifang Cao, Winston Soboyejo, Stephen Forrest