Patents by Inventor Yi-Fang Su

Yi-Fang Su has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11923200
    Abstract: An integrated circuit includes a gate structure over a substrate. The integrated circuit includes a first silicon-containing material structure in a recess. The first silicon-containing material structure includes a first layer below a top surface of the substrate and in direct contact with the substrate. The first silicon-containing material structure includes a second layer over the first layer, wherein an entirety of the second layer is above the top surface of the substrate, a first region of the second layer closer to the gate structure is thinner than a second region of the second layer farther from the gate structure. The first silicon-containing material structure includes a third layer between the first layer and the second layer, wherein at least a portion of the third layer is below the top surface of the substrate.
    Type: Grant
    Filed: May 25, 2022
    Date of Patent: March 5, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shih-Hsien Huang, Yi-Fang Pai, Chien-Chang Su
  • Patent number: 7142938
    Abstract: A manufacturing management system and method. The system includes a manufacturing execution system and a plurality of manufacturing sites coupled to the manufacturing execution system. The manufacturing execution system comprises management data to support the manufacturing sites. Each manufacturing site comprises a corresponding site attribute. At least one of the manufacturing sites receives a lot, queries the management data for the lot from the manufacturing execution system according to lot identification and the site attribute of the manufacturing site receiving the lot, and processes the lot accordingly.
    Type: Grant
    Filed: October 13, 2004
    Date of Patent: November 28, 2006
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shiaw-Lin Chi, Kun-Chi Liu, Chien-Wei Wang, Chih-Chien Chang, Chang-Hsi Lin, Chien-Fei Cheng, Lieh-Jung Chen, Fang-Ni Wu, Birgie Kuo, Yi-Fang Su
  • Publication number: 20060079978
    Abstract: A manufacturing management system and method. The system includes a manufacturing execution system and a plurality of manufacturing sites coupled to the manufacturing execution system. The manufacturing execution system comprises management data to support the manufacturing sites. Each manufacturing site comprises a corresponding site attribute. At least one of the manufacturing sites receives a lot, queries the management data for the lot from the manufacturing execution system according to lot identification and the site attribute of the manufacturing site receiving the lot, and processes the lot accordingly.
    Type: Application
    Filed: October 13, 2004
    Publication date: April 13, 2006
    Inventors: Shiaw-Lin Chi, Kun-Chi Liu, Chien-Wei Wang, Chih-Chien Chang, Chang-Hsi Lin, Chien-Fei Cheng, Lieh-Jung Chen, Fang-Ni Wu, Birgie Kuo, Yi-Fang Su