Patents by Inventor Yi-Fang YANG
Yi-Fang YANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12225139Abstract: A method and device for issuing an identity certificate to a blockchain node in a blockchain network includes issuing a first identity certificate to a first terminal. a second identity certificate issuance request that is from the first terminal and that is made by using the first identity certificate is received and a second identity certificate is issued to the first terminal, which forwards the second identity certificate to a second terminal. A third identity certificate issuance request that is from the second terminal and that is made by using the second identity certificate is received and a third identity certificate is issued to the second terminal, which forwards the third identity certificate to a third terminal.Type: GrantFiled: February 15, 2024Date of Patent: February 11, 2025Assignee: TENCENT TECHNOLOGY (SHENZHEN) COMPANY LIMITEDInventors: Mao Cai Li, Zong You Wang, Kai Ban Zhou, Chang Qing Yang, Hu Lan, Li Kong, Jin Song Zhang, Yi Fang Shi, Geng Liang Zhu, Qu Cheng Liu, Qiu Ping Chen
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Publication number: 20240136383Abstract: A semiconductor device includes a single-layered dielectric layer, a conductive line, a conductive via and a conductive pad. The conductive line and the conductive via are disposed in the single-layered dielectric layer. The conductive pad is extended into the single-layered dielectric layer to electrically connected to the conductive line.Type: ApplicationFiled: January 3, 2024Publication date: April 25, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yu-Chien Ku, Huai-Jen Tung, Keng-Ying Liao, Yi-Hung Chen, Shih-Hsun Hsu, Yi-Fang Yang
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Patent number: 11901390Abstract: A semiconductor device includes a substrate, a dielectric layer, a plurality of dielectric patterns and a conductive pad. The substrate includes a first surface and a second surface opposite to the first surface. The dielectric layer is disposed at the first surface of the substrate, and the substrate is disposed between the dielectric layer and the second surface of the substrate. The dielectric patterns are disposed on the dielectric layer and between the first surface and the second surface of the substrate. The conductive pad is inserted between the plurality of dielectric patterns and extended into the dielectric layer.Type: GrantFiled: November 15, 2021Date of Patent: February 13, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yu-Chien Ku, Huai-Jen Tung, Keng-Ying Liao, Yi-Hung Chen, Shih-Hsun Hsu, Yi-Fang Yang
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Publication number: 20220077217Abstract: A semiconductor device includes a substrate, a dielectric layer, a plurality of dielectric patterns and a conductive pad. The substrate includes a first surface and a second surface opposite to the first surface. The dielectric layer is disposed at the first surface of the substrate, and the substrate is disposed between the dielectric layer and the second surface of the substrate. The dielectric patterns are disposed on the dielectric layer and between the first surface and the second surface of the substrate. The conductive pad is inserted between the plurality of dielectric patterns and extended into the dielectric layer.Type: ApplicationFiled: November 15, 2021Publication date: March 10, 2022Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yu-Chien Ku, Huai-Jen Tung, Keng-Ying Liao, Yi-Hung Chen, Shih-Hsun Hsu, Yi-Fang Yang
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Patent number: 11177308Abstract: CMOS sensors and methods of forming the same are disclosed. The CMOS sensor includes a semiconductor substrate, a plurality of dielectric patterns, a first conductive element and a second conductive element. The semiconductor substrate has a pixel region and a circuit region. The dielectric patterns are disposed between the first portion and the second portion, wherein top surfaces of the plurality of dielectric patterns are lower than top surfaces of the first and second portions. The first conductive element is disposed below the plurality of dielectric patterns. The second conductive element inserts between the plurality of dielectric patterns to electrically connect the first conductive element.Type: GrantFiled: May 6, 2019Date of Patent: November 16, 2021Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yu-Chien Ku, Huai-Jen Tung, Keng-Ying Liao, Yi-Hung Chen, Shih-Hsun Hsu, Yi-Fang Yang
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Patent number: 10921704Abstract: The disclosure provides a method for controlling a projection content and an electronic device. The method includes: controlling a projector to project a display content on a projection plane; obtaining a display range of the display content on the projection plane; detecting a light spot on the projection plane; and adjusting the display content based on a movement condition of the light spot with respect to the display range.Type: GrantFiled: September 29, 2019Date of Patent: February 16, 2021Assignee: Wistron CorporationInventors: Yi-Fang Yang, Chien Huang, Keng-Hsien Yang
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Publication number: 20210011367Abstract: The disclosure provides a method for controlling a projection content and an electronic device. The method includes: controlling a projector to project a display content on a projection plane; obtaining a display range of the display content on the projection plane; detecting a light spot on the projection plane; and adjusting the display content based on a movement condition of the light spot with respect to the display range.Type: ApplicationFiled: September 29, 2019Publication date: January 14, 2021Applicant: Wistron CorporationInventors: Yi-Fang Yang, Chien Huang, Keng-Hsien Yang
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Patent number: 10879738Abstract: An electronic apparatus including a hand-held electronic device and a platform device is provided. The platform device is detachably connected to the hand-held electronic device. The platform device includes a power supply, a power management device, a wireless power management circuit and an antenna. The power supply is used to provide a supply power. The power management device generates at least one operation power according to the supply power. The wireless power management circuit generates a wireless power according to the at least one operation power. The antenna of the platform device performs a charging operation on at least one to-be-charged device through an electromagnetic induction according to the wireless power.Type: GrantFiled: August 4, 2019Date of Patent: December 29, 2020Assignee: Wistron CorporationInventors: Yi-Fang Yang, Wei-Cheng Chiu, Wen-Hsin Hsiao
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Publication number: 20200381943Abstract: An electronic apparatus including a hand-held electronic device and a platform device is provided. The platform device is detachably connected to the hand-held electronic device. The platform device includes a power supply, a power management device, a wireless power management circuit and an antenna. The power supply is used to provide a supply power. The power management device generates at least one operation power according to the supply power. The wireless power management circuit generates a wireless power according to the at least one operation power. The antenna of the platform device performs a charging operation on at least one to-be-charged device through an electromagnetic induction according to the wireless power.Type: ApplicationFiled: August 4, 2019Publication date: December 3, 2020Applicant: Wistron CorporationInventors: Yi-Fang Yang, Wei-Cheng Chiu, Wen-Hsin Hsiao
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Patent number: 10522585Abstract: A semiconductor device includes a substrate, a conductive layer, a transparent layer, a transparent hard mask layer, a carrier, and a device layer. The substrate has a first surface and a second surface opposite to each other. The conductive layer is disposed on the first surface of the substrate. The transparent layer is disposed on the conductive layer. The transparent hard mask layer is disposed on the transparent layer, in which the substrate has an etch selectivity with respect to the transparent hard mask layer. The device layer is disposed between the carrier and the second surface of the substrate, in which various portions of the device layer are respectively exposed by various through holes which pass through the transparent hard mask layer, the transparent layer, the conductive layer, and the substrate.Type: GrantFiled: April 17, 2017Date of Patent: December 31, 2019Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Yi-Fang Yang, Yi-Hung Chen, Keng-Ying Liao, Yi-Jie Chen, Shih-Hsun Hsu, Chun-Chi Lee
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Publication number: 20190259800Abstract: CMOS sensors and methods of forming the same are disclosed. The CMOS sensor includes a semiconductor substrate, a plurality of dielectric patterns, a first conductive element and a second conductive element. The semiconductor substrate has a pixel region and a circuit region. The dielectric patterns are disposed between the first portion and the second portion, wherein top surfaces of the plurality of dielectric patterns are lower than top surfaces of the first and second portions. The first conductive element is disposed below the plurality of dielectric patterns. The second conductive element inserts between the plurality of dielectric patterns to electrically connect the first conductive element.Type: ApplicationFiled: May 6, 2019Publication date: August 22, 2019Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Yu-Chien Ku, Huai-Jen Tung, Keng-Ying Liao, Yi-Hung Chen, Shih-Hsun Hsu, Yi-Fang Yang
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Publication number: 20190140010Abstract: CMOS sensors and methods of forming the same are disclosed. The CMOS sensor includes a semiconductor substrate, a dielectric layer, an interconnect, a bonding pad and a dummy pattern. The semiconductor substrate has a pixel region and a circuit region. The dielectric layer is surrounded by the semiconductor substrate in the circuit region. The interconnect is disposed over the dielectric layer in the circuit region. The bonding pad is disposed in the dielectric layer and electrically connects the interconnect in the circuit region. The dummy pattern is disposed in the dielectric layer and surrounds the bonding pad in the circuit region.Type: ApplicationFiled: January 31, 2018Publication date: May 9, 2019Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Yu-Chien Ku, Huai-Jen Tung, Keng-Ying Liao, Yi-Hung Chen, Shih-Hsun Hsu, Yi-Fang Yang
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Patent number: 10283548Abstract: CMOS sensors and methods of forming the same are disclosed. The CMOS sensor includes a semiconductor substrate, a dielectric layer, an interconnect, a bonding pad and a dummy pattern. The semiconductor substrate has a pixel region and a circuit region. The dielectric layer is surrounded by the semiconductor substrate in the circuit region. The interconnect is disposed over the dielectric layer in the circuit region. The bonding pad is disposed in the dielectric layer and electrically connects the interconnect in the circuit region. The dummy pattern is disposed in the dielectric layer and surrounds the bonding pad in the circuit region.Type: GrantFiled: January 31, 2018Date of Patent: May 7, 2019Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Yu-Chien Ku, Huai-Jen Tung, Keng-Ying Liao, Yi-Hung Chen, Shih-Hsun Hsu, Yi-Fang Yang
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Patent number: 10141362Abstract: A semiconductor device having a protection layer wrapping around a conductive structure is provided. The semiconductor device comprises an image sensor device layer, an interconnect layer over the image sensor device layer, a first bonding layer over the interconnect layer, a second bonding layer bonded with the first bonding layer, a substrate over the second bonding layer, and a conductive via passing through the substrate, the second bonding layer, and the first bonding layer. The conductive via comprises a protection layer and a conductive material. The protection layer is peripherally enclosed by the substrate, the second bonding layer, and the first bonding layer. The protection layer covers a sidewall cut formed at an interface of the second bonding layer and the first bonding layer. The conductive material is peripherally enclosed by the protection layer.Type: GrantFiled: March 12, 2018Date of Patent: November 27, 2018Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Chih-Wei Sung, Yi-Hung Chen, Keng-Ying Liao, Yi-Fang Yang, Chih-Yu Wu
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Publication number: 20180315790Abstract: A semiconductor device having a protection layer wrapping around a conductive structure is provided. The semiconductor device comprises an image sensor device layer, an interconnect layer over the image sensor device layer, a first bonding layer over the interconnect layer, a second bonding layer bonded with the first bonding layer, a substrate over the second bonding layer, and a conductive via passing through the substrate, the second bonding layer, and the first bonding layer. The conductive via comprises a protection layer and a conductive material. The protection layer is peripherally enclosed by the substrate, the second bonding layer, and the first bonding layer. The protection layer covers a sidewall cut formed at an interface of the second bonding layer and the first bonding layer. The conductive material is peripherally enclosed by the protection layer.Type: ApplicationFiled: March 12, 2018Publication date: November 1, 2018Inventors: Chih-Wei Sung, Yi-Hung Chen, Keng-Ying Liao, Yi-Fang Yang, Chih-Yu Wu
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Publication number: 20180301501Abstract: A semiconductor device includes a substrate, a conductive layer, a transparent layer, a transparent hard mask layer, a carrier, and a device layer. The substrate has a first surface and a second surface opposite to each other. The conductive layer is disposed on the first surface of the substrate. The transparent layer is disposed on the conductive layer. The transparent hard mask layer is disposed on the transparent layer, in which the substrate has an etch selectivity with respect to the transparent hard mask layer. The device layer is disposed between the carrier and the second surface of the substrate, in which various portions of the device layer are respectively exposed by various through holes which pass through the transparent hard mask layer, the transparent layer, the conductive layer, and the substrate.Type: ApplicationFiled: April 17, 2017Publication date: October 18, 2018Inventors: Yi-Fang Yang, Yi-Hung Chen, Keng-Ying Liao, Yi-Jie Chen, Shih-Hsun Hsu, Chun-Chi Lee
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Patent number: 9929203Abstract: A semiconductor device and a method for fabricating thereof are provided. In the method for fabricating the semiconductor device, at first, a first semiconductor wafer including a first oxide layer and a second semiconductor wafer including a second oxide layer are provided. Next, the second oxide layer is bonded with the first oxide layer. Then, a through via is formed to through the second oxide layer and the first oxide layer, so as to form a sidewall cut on a sidewall of the through via at an interface of the first oxide layer and the second oxide layer. Then, an ashing operation is performed on the sidewall of the through via to form a protection layer on the sidewall of the through via. After the ashing operation is performed, a conductive material is deposited on the through via.Type: GrantFiled: April 27, 2017Date of Patent: March 27, 2018Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Chih-Wei Sung, Yi-Hung Chen, Keng-Ying Liao, Yi-Fang Yang, Chih-Yu Wu
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Patent number: 9068687Abstract: The supporting apparatus includes a base, a device supporting portion, a device connecting portion, and a linking rod. The base includes a front end and a rear end; the device supporting portion includes a supporting element and a first rotating shaft, wherein the first rotating shaft is pivotally connected to the front end of the base and connected with the supporting element for allowing the supporting element to rotate along the first rotating shaft such that the supporting apparatus has a closed state and a first open state. When the supporting apparatus rotates to the first open state, the connecting element and the linking rod form a first connecting element opening angle ?21 for allowing the connecting element to connect with the first lateral surface of an electronic device and the supporting element to contact a bottom surface of the electronic device.Type: GrantFiled: July 16, 2013Date of Patent: June 30, 2015Assignee: WISTRON CORPORATIONInventors: Guang Hu, Yi-Fang Yang, Wei Gao
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Publication number: 20140048674Abstract: The supporting apparatus includes a base, a device supporting portion, a device connecting portion, and a linking rod. The base includes a front end and a rear end; the device supporting portion includes a supporting element and a first rotating shaft, wherein the first rotating shaft is pivotally connected to the front end of the base and connected with the supporting element for allowing the supporting element to rotate along the first rotating shaft such that the supporting apparatus has a closed state and a first open state. When the supporting apparatus rotates to the first open state, the connecting element and the linking rod form a first connecting element opening angle ?21 for allowing the connecting element to connect with the first lateral surface of an electronic device and the supporting element to contact a bottom surface of the electronic device.Type: ApplicationFiled: July 16, 2013Publication date: February 20, 2014Applicant: WISTRON CORPORATIONInventors: Guang HU, Yi-Fang YANG, Wei GAO