Abstract: A shift register and a display driver thereof are provided. The display driver submitted by the present invention can be directly disposed on a glass substrate of a liquid crystal display (LCD) panel to replace a scan driver commonly used in prior art, so that the cost of the liquid crystal display can be reduced. In addition, the stress taken by the output stage transistor of each shift register stage within the display driver submitted by the present invention can be reduced. Thus, each shift register stage has the highest reliability, and may consequently avoid the erroneous actions when each shift register stage is operated for a long time.

Abstract: A shift register and a display driver thereof are provided. The display driver submitted by the present invention can be directly disposed on a glass substrate of a liquid crystal display (LCD) panel to replace a scan driver commonly used in prior art, so that the cost of the liquid crystal display can be reduced. In addition, the stress taken by the output stage transistor of each shift register stage within the display driver submitted by the present invention can be reduced. Thus, each shift register stage has the highest reliability, and may consequently avoid the erroneous actions when each shift register stage is operated for a long time.

Abstract: A shift register including a plurality of stage circuits is provided. Each of the stage circuits has a shift circuit for receiving an input signal and providing an output signal. The output signal is obtained through the logic calculation and delaying of the input signal. Each of the stage circuits, except the first one, further includes a logic circuit used to produce at least one control signal according to the internal signals of the containing stage circuit, so as to replace at least one of the required clock signals during the operation of the corresponding shift circuit.

Abstract: A shift register including a plurality of stage circuits is provided. Each of the stage circuits has a shift circuit for receiving an input signal and providing an output signal. The output signal is obtained through the logic calculation and delaying of the input signal. Each of the stage circuits, except the first one, further includes a logic circuit used to produce at least one control signal according to the internal signals of the containing stage circuit, so as to replace at least one of the required clock signals during the operation of the corresponding shift circuit.