Patents by Inventor Yi-Feng Lin

Yi-Feng Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250141347
    Abstract: A resonant converter having a switch on-time control mechanism is provided. The resonant converter includes a primary-side switch circuit, a primary-side resonant circuit, a secondary-side switch circuit, a secondary-side resonant circuit, a transformer and a control circuit. In the resonant converter, the control circuit controls on-times and switching frequencies of the primary-side switch circuit and the secondary-side switch circuit to extend time within which power is transmitted from an input power source, the primary-side switch circuit, the primary-side resonant circuit and the transformer to the secondary-side resonant circuit, and stored in the secondary-side resonant circuit. As a result, the secondary-side resonant circuit is able to supply more power to a load.
    Type: Application
    Filed: December 25, 2023
    Publication date: May 1, 2025
    Inventors: JING-YUAN LIN, Yan-Cheng Hou, Yi-Feng Lin
  • Patent number: 12141460
    Abstract: A method for performing data access management of an all flash array (AFA) server and the AFA server operating according to the method are provided. The method includes: utilizing an upper layer program module running on a first node to detect whether any request from a client device of a user is received; in response to a write request, utilizing an intermediate layer program module to mirror data corresponding to the write request to a second node; and before the intermediate layer program module flushing the data to a lower layer program module, in response to the data being mirrored from a first volatile memory of the first node to a second volatile memory of the second node, utilizing the intermediate layer program module to send an acknowledgement to the client device without checking whether the data has been protected in any non-volatile memory of any of the multiple nodes.
    Type: Grant
    Filed: August 3, 2020
    Date of Patent: November 12, 2024
    Assignee: Silicon Motion, Inc.
    Inventor: Yi-Feng Lin
  • Publication number: 20240186893
    Abstract: A boost converter is provided. A first terminal of a first inductor of the boost converter is connected to a positive terminal of an input power source. In the of the boost converter, a second terminal of the first inductor is connected to a first terminal of a resonant inductor, and a second terminal of the resonant inductor is connected to a first terminal of a main switch. A second terminal of the main switch is connected to a negative terminal of the input power source. In the of the boost converter, a first terminal of a clamp switch is connected to the second terminal of the resonant inductor, a second terminal of the clamp switch is connected to a first terminal of a first storage capacitor, and a second terminal of the first storage capacitor is connected to the first terminal of the first inductor.
    Type: Application
    Filed: February 27, 2023
    Publication date: June 6, 2024
    Inventors: JING-YUAN LIN, Yi-Feng Lin, Chuan-Ting Chen
  • Patent number: 11831244
    Abstract: A resonant converter having a pre-conduction mechanism for realizing a wide output voltage range is provided. The resonant converter includes a first circuit and a second circuit. The first circuit includes a plurality of primary-side switches. The plurality of primary-side switches includes a first high-side switch, a second high-side switch, a first low-side switch and a second low-side switch. The second circuit includes a plurality of secondary-side switches. The plurality of secondary-side switches includes a third high-side switch, a fourth high-side switch, a third low-side switch and a fourth low-side switch. When the second low-side switch and the first low-side switch are turned on and a current time reaches a preset on time, the fourth high-side switch and the third low-side switch are turned on.
    Type: Grant
    Filed: February 28, 2022
    Date of Patent: November 28, 2023
    Assignee: NATIONAL TAIWAN UNIVERSITY OF SCIENCE AND TECHNOLOGY
    Inventors: Jing-Yuan Lin, Hsuan-Yu Yueh, Yi-Feng Lin, Che-Yu Chang
  • Publication number: 20230251865
    Abstract: In example implementations, an apparatus is provided. The apparatus includes an interface, a previous generation carrier connected to the interface, a controller communicatively coupled to the interface, and a basic input/output system (BIOS). The previous generation carrier includes a current generation memory card. The controller is to detect the previous generation carrier. The BIOS is to set the interface to operate at a speed associated with the previous generation carrier in response to detection of the previous generation carrier.
    Type: Application
    Filed: February 9, 2022
    Publication date: August 10, 2023
    Inventors: CHAO-WEN CHENG, WEN SHIH CHEN, CHEN-PANG CHANG, YI-FENG LIN
  • Publication number: 20230221898
    Abstract: In example implementations, an apparatus is provided. The apparatus includes a polymer based enclosure, an absorber, and a connection interface. The polymer based enclosure is shaped to enclose a memory module connected to a memory module connection interface on a printed circuit board. The absorber is coated over the polymer based enclosure to block radio frequency signals generated by the memory modules. The connection interface is to connect to the memory module connection interface.
    Type: Application
    Filed: January 13, 2022
    Publication date: July 13, 2023
    Inventors: Ying-Chi Chou, Chien Fa Huang, Yi-Feng Lin
  • Publication number: 20230155511
    Abstract: A resonant converter having a pre-conduction mechanism for realizing a wide output voltage range is provided. The resonant converter includes a first circuit and a second circuit. The first circuit includes a plurality of primary-side switches. The plurality of primary-side switches includes a first high-side switch, a second high-side switch, a first low-side switch and a second low-side switch. The second circuit includes a plurality of secondary-side switches. The plurality of secondary-side switches includes a third high-side switch, a fourth high-side switch, a third low-side switch and a fourth low-side switch. When the second low-side switch and the first low-side switch are turned on and a current time reaches a preset on time, the fourth high-side switch and the third low-side switch are turned on.
    Type: Application
    Filed: February 28, 2022
    Publication date: May 18, 2023
    Inventors: JING-YUAN LIN, HSUAN-YU YUEH, Yi-Feng Lin, Che-Yu Chang
  • Patent number: 11552574
    Abstract: An interleaved three-phase Y-Delta connected power converter is provided. The interleaved three-phase Y-Delta connected power converter includes an input voltage source, an input capacitor, a first converter module, a second converter module, an output circuit, and a control circuit. The control circuit calculates a phase shift amount and an operating frequency through voltage and current feedbacks to generate a plurality of switch signal groups for controlling the first converter module and the second converter module, respectively.
    Type: Grant
    Filed: May 6, 2021
    Date of Patent: January 10, 2023
    Assignee: National Taiwan University of Science and Technology
    Inventors: Jing-Yuan Lin, Guan-Lin Chen, Kuan-Hung Chen, Yi-Feng Lin
  • Patent number: 11409471
    Abstract: The present invention provides a server including a SSD, a first node and a second node, wherein the first node comprises a first processor and a first memory, and the second node comprises a second processor and a second memory. When the first processor receives data from another device via network, the first processor stores the data in the first memory, and the first processor further sends the data to the second node; when the second processor receives the data from the first node, the second processor stores the data in the second memory, and the second processor further sends a notification to the first node to inform that the data is successfully stored in the second memory; and after and only after the first processor receives the notification from the second node, the first processor starts to write the data into the SSD.
    Type: Grant
    Filed: January 20, 2021
    Date of Patent: August 9, 2022
    Assignee: Silicon Motion, Inc.
    Inventor: Yi-Feng Lin
  • Publication number: 20220140738
    Abstract: An interleaved three-phase Y-Delta connected power converter is provided. The interleaved three-phase Y-Delta connected power converter includes an input voltage source, an input capacitor, a first converter module, a second converter module, an output circuit, and a control circuit. The control circuit calculates a phase shift amount and an operating frequency through voltage and current feedbacks to generate a plurality of switch signal groups for controlling the first converter module and the second converter module, respectively.
    Type: Application
    Filed: May 6, 2021
    Publication date: May 5, 2022
    Inventors: Jing-Yuan Lin, Guan-Lin Chen, Kuan-Hung Chen, Yi-Feng Lin
  • Publication number: 20210271420
    Abstract: The present invention provides a server including a SSD, a first node and a second node, wherein the first node comprises a first processor and a first memory, and the second node comprises a second processor and a second memory. When the first processor receives data from another device via network, the first processor stores the data in the first memory, and the first processor further sends the data to the second node; when the second processor receives the data from the first node, the second processor stores the data in the second memory, and the second processor further sends a notification to the first node to inform that the data is successfully stored in the second memory; and after and only after the first processor receives the notification from the second node, the first processor starts to write the data into the SSD.
    Type: Application
    Filed: January 20, 2021
    Publication date: September 2, 2021
    Inventor: Yi-Feng Lin
  • Publication number: 20210271650
    Abstract: A method for performing deduplication management with aid of a command-related filter and associated apparatus are provided. The method may include: utilizing at least one program module among multiple program modules running on a host device within the storage server to control the storage server to write multiple sets of user data of a user of the storage server into a storage device layer of the storage server, and utilizing a fingerprint-based deduplication management module among the multiple program modules to create and store multiple fingerprints into a fingerprint storage of the storage server to be respective representatives of the multiple sets of user data at the storage server, for minimizing calculation loading regarding deduplication control; and utilizing the command-related filter to at least convert a set of commands into a single command to eliminate unnecessary command(s), for executing the single command rather than all of the set of commands.
    Type: Application
    Filed: January 4, 2021
    Publication date: September 2, 2021
    Inventors: Wen-Long Wang, Yu-Teng Chiu, Yi-Feng Lin
  • Publication number: 20210271393
    Abstract: A method for performing data access management of an all flash array (AFA) server and the AFA server operating according to the method are provided. The method includes: utilizing an upper layer program module running on a first node to detect whether any request from a client device of a user is received; in response to a write request, utilizing an intermediate layer program module to mirror data corresponding to the write request to a second node; and before the intermediate layer program module flushing the data to a lower layer program module, in response to the data being mirrored from a first volatile memory of the first node to a second volatile memory of the second node, utilizing the intermediate layer program module to send an acknowledgement to the client device without checking whether the data has been protected in any non-volatile memory of any of the multiple nodes.
    Type: Application
    Filed: August 3, 2020
    Publication date: September 2, 2021
    Inventor: Yi-Feng Lin
  • Patent number: 10579118
    Abstract: Example implementations relate to detection circuits. In one example, a detection circuit includes a power supply, a transistor coupled to the power supply, a port coupled via the transistor to the power supply, where the port is to transmit power received via the transistor from the power supply to a corresponding port included in an external device when the corresponding port is coupled to the port, and a detection circuit to detect a voltage between the port and the corresponding port when the port is coupled to the corresponding port and interrupt, via the transistor, power supplied to the port when the detected voltage satisfies a threshold voltage.
    Type: Grant
    Filed: January 6, 2016
    Date of Patent: March 3, 2020
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Po-Lan Wang, Jen-Chun Hsu, Yi-Feng Lin
  • Publication number: 20190262799
    Abstract: A Mg-doped alumina aerogel and a manufacturing method thereof are provided. The Mg-doped alumina aerogel is a three-dimensional cross-linked network structure including a plurality of magnesium atoms, a plurality of aluminum atoms, a plurality of oxygen atoms, and a plurality of hydrogen atoms. The three-dimensional cross-linked network structure has a —Mg—O—Al— bond at least on the main chain.
    Type: Application
    Filed: May 2, 2018
    Publication date: August 29, 2019
    Applicant: Chung Yuan Christian University
    Inventors: Yi-Feng Lin, Yong-Jie Lin
  • Patent number: 10101766
    Abstract: A handle module has a housing conforming to a disk drive form factor. The handle module has mounting features configured to securely install the housing in a slot conforming to the disk drive form factor. The handle module has a finger-friendly recess extending from a front of the handle module and into an interior of the housing.
    Type: Grant
    Filed: October 22, 2010
    Date of Patent: October 16, 2018
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Yi-Feng Lin, Barry T. Phillips, David Quijano, Gregory A. Standiford, Josh K. Peterson
  • Publication number: 20180224912
    Abstract: Example implementations relate to detection circuits. In one example, a detection circuit includes a power supply, a transistor coupled to the power supply, a port coupled via the transistor to the power supply, where the port is to transmit power received via the transistor from the power supply to a corresponding port included in an external device when the corresponding port is coupled to the port, and a detection circuit to detect a voltage between the port and the corresponding port when the port is coupled to the corresponding port and interrupt, via the transistor, power supplied to the port when the detected voltage satisfies a threshold voltage.
    Type: Application
    Filed: January 6, 2016
    Publication date: August 9, 2018
    Applicant: Hewlett-Packard Development Company
    Inventors: Po-Lan Wang, Jen-Chun Hsu, Yi-Feng Lin
  • Publication number: 20180123917
    Abstract: A system for monitoring multiple devices in a network, which can be applied in a common server, includes setting a logging program into each terminal device whereby each terminal device updates and outputs a log file to the server at preset times. The coupling of a new IP address (of a new device) to the network can be detected. The system monitors all the devices for certain abnormalities and posts notifications to a manager concerning individual devices if such abnormalities occur. A device monitoring method is further provided.
    Type: Application
    Filed: November 21, 2016
    Publication date: May 3, 2018
    Inventors: SHENG-CHUNG PAN, YEN-HSUAN CHEN, KUANG-CHAN TUNG, YI-FENG LIN, YIN-YEN CHIEN
  • Patent number: 9636633
    Abstract: The present invention provides a method for making a porous silica aerogel composite membrane. The porous silicon oxide aerogel composite membrane includes a porous aluminum oxide membrane having a plurality of macro pores with an average diameter larger than 50 nm and a porous silica aerogel membrane formed on at least one side of the porous aluminum oxide membrane and the macro pores of surface layers of the porous aluminum oxide membrane where the porous silica aerogel membrane has a plurality of meso pores with an average diameter of 2˜50 nm and is derived from methyltrimethoxysilane precursor by a sol-gel synthetic method.
    Type: Grant
    Filed: December 19, 2016
    Date of Patent: May 2, 2017
    Assignee: CHUNG YUAN CHRISTIAN UNIVERSITY
    Inventors: Yi-Feng Lin, Chia-Chieh Ko, Kuo-Lun Tung, Chien-Hua Chen, Kai-Shiun Chang
  • Patent number: 9617174
    Abstract: A hydrophobic porous silica aerogel composite membrane for a vacuum membrane distillation device and a vacuum distillation method are disclosed. The vacuum membrane distillation device has a case and the hydrophobic porous silica aerogel composite membrane accommodated in the case to divide a chamber defined by the case into a feed part configured to feed a first fluid containing water molecules and a permeate part configured to collect a second fluid containing the water molecules. The hydrophobic porous silica aerogel composite membrane includes a porous aluminum oxide membrane that has a plurality of first pores with average pore diameter larger than 50 nm and a porous silica aerogel membrane that has a plurality of second pores of 2 to 50 nm and is formed on at least one side of the porous aluminum oxide membrane facing the feed part by methylmethoxysilane as a precursor and a sol-gel synthetic process.
    Type: Grant
    Filed: September 3, 2015
    Date of Patent: April 11, 2017
    Assignee: NATIONAL TAIWAN UNIVERSITY
    Inventors: Kuo-Lun Tung, Chung-Chin Yang, Chia-Chieh Ko, Chien-Hua Chen, Yi-Feng Lin