Patents by Inventor Yigal Eli
Yigal Eli has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10289552Abstract: A storage system and method are provided for flush optimization. In one embodiment, a storage system is provided comprising a cache, a non-volatile memory, and a controller. The controller is configured to: store, in the cache, data received from a host and to be written in the non-volatile memory; receive a command from the host to move the data stored in the cache into the non-volatile memory; without having executed the command, send a confirmation to the host that the command was executed; and execute the command after sending the continuation to the host.Type: GrantFiled: June 1, 2017Date of Patent: May 14, 2019Assignee: Western Digital Technologies, Inc.Inventors: Tal Heller, Hadas Oshinsky, Rotem Sela, Einav Zilberstein, Amir Shaharabany, Yigal Eli
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Publication number: 20180322051Abstract: A storage system and method are provided for flush optimization. In one embodiment, a storage system is provided comprising a cache, a non-volatile memory, and a controller. The controller is configured to: store, in the cache, data received from a host and to be written in the non-volatile memory; receive a command from the host to move the data stored in the cache into the non-volatile memory; without having executed the command, send a confirmation to the host that the command was executed; and execute the command after sending the continuation to the host.Type: ApplicationFiled: June 1, 2017Publication date: November 8, 2018Applicant: Western Digital Technologies, Inc.Inventors: Tal Heller, Hadas Oshinsky, Rotem Sela, Einav Zilberstein, Amir Shaharabany, Yigal Eli
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Patent number: 10002042Abstract: A device includes a non-volatile memory and a controller coupled to the non-volatile memory. The non-volatile memory includes a plurality of blocks and each block of the plurality of blocks includes a plurality of word lines. The controller is configured to receive data read from a word line of a block of the non-volatile memory and to determine an error indicator value based on the data. The controller is further configured to, responsive to the error indicator value satisfying a threshold, indicate that at least a portion of the word line is to be skipped during writing of second data to the block of the non-volatile memory.Type: GrantFiled: October 22, 2015Date of Patent: June 19, 2018Assignee: SanDisk Technologies LLCInventors: Idan Alrod, Eran Sharon, Yigal Eli, Roi Kirshenbaum, Uri Peltz, Karin Inbar
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Publication number: 20170116070Abstract: A device includes a non-volatile memory and a controller coupled to the non-volatile memory. The non-volatile memory includes a plurality of blocks and each block of the plurality of blocks includes a plurality of word lines. The controller is configured to receive data read from a word line of a block of the non-volatile memory and to determine an error indicator value based on the data. The controller is further configured to, responsive to the error indicator value satisfying a threshold, indicate that at least a portion of the word line is to be skipped during writing of second data to the block of the non-volatile memory.Type: ApplicationFiled: October 22, 2015Publication date: April 27, 2017Inventors: IDAN ALROD, ERAN SHARON, YIGAL ELI, ROI KIRSHENBAUM, URI PELTZ, KARIN INBAR
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Patent number: 9455048Abstract: Systems and methods for improving NAND flash memory yields by identifying memory blocks with benign word line defects. Memory blocks including word line defects may be classified as incomplete memory blocks and may be used for storing data fragments. A data fragment may correspond with data written into memory cells associated with one or more contiguous word lines within a memory block that does not include a bad word line. In some cases, firmware associated with a NAND flash memory device may identify one or more data fragments based on the location of bad word lines within a memory block. A word line defect may be considered a benign defect if the defect does not prevent memory cells connected to other word lines within a memory block from being programmed and/or read reliably.Type: GrantFiled: June 28, 2013Date of Patent: September 27, 2016Assignee: SANDISK TECHNOLOGIES LLCInventors: Tucker Dean Berckmann, Talal Ahwal, Damian Yurzola, Krishnamurthy Dhakshinamurthy, Yong Peng, Rajeev Nagabhirava, Arjun Hary, Tal Heller, Yigal Eli
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Patent number: 9064585Abstract: Programmer's data that is transferred from a programming device to a storage device is initially stored in a memory device of the storage device by using a durable data-retention storage setup. After the storage device is embedded in a host device, the programmer's data is internally (i.e., in the storage device) read from the memory device and rewritten into the memory device by using a conventional storage setup. Using a durable data-retention storage setup may include temporarily (i.e., before the storage device is embedded in a host) operating selected memory cells of the memory device as conventional SBC cells or as unconventional MBC cells. After the storage device is embedded in a host device, the programmer's data, or selected parts thereof, is read from the memory device and rewritten into it by operating selected memory cells of the memory device as conventional MBC cells.Type: GrantFiled: April 21, 2014Date of Patent: June 23, 2015Assignee: SANDISK IL LTD.Inventors: Shahar Bar-Or, Dan Inbar, Ori Moshe Stern, Yigal Eli
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Publication number: 20150003156Abstract: Methods for improving NAND flash memory yields by identifying memory blocks with benign word line defects are described. Memory blocks including word line defects may be classified as incomplete memory blocks and may be used for storing data fragments. A data fragment may correspond with data written into memory cells associated with one or more contiguous word lines within a memory block that does not include a bad word line. In some cases, firmware associated with a NAND flash memory device may identify one or more data fragments based on the location of bad word lines within a memory block. A word line defect may be considered a benign defect if the defect does not prevent memory cells connected to other word lines within a memory block from being programmed and/or read reliably.Type: ApplicationFiled: June 28, 2013Publication date: January 1, 2015Inventors: Tucker Dean Berckmann, Talal Ahwal, Damian Yurzola, Krishnamurthy Dhakshinamurthy, Yong Peng, Rajeev Nagabhirava, Arjun Hary, Tal Heller, Yigal Eli
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Publication number: 20140229664Abstract: Programmer's data that is transferred from a programming device to a storage device is initially stored in a memory device of the storage device by using a durable data-retention storage setup. After the storage device is embedded in a host device, the programmer's data is internally (i.e., in the storage device) read from the memory device and rewritten into the memory device by using a conventional storage setup. Using a durable data-retention storage setup may include temporarily (i.e., before the storage device is embedded in a host) operating selected memory cells of the memory device as conventional SBC cells or as unconventional MBC cells. After the storage device is embedded in a host device, the programmer's data, or selected parts thereof, is read from the memory device and rewritten into it by operating selected memory cells of the memory device as conventional MBC cells.Type: ApplicationFiled: April 21, 2014Publication date: August 14, 2014Applicant: SANDISK IL LTD.Inventors: SHAHAR BAR-OR, DAN INBAR, ORI MOSHE STERN, YIGAL ELI
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Patent number: 8743629Abstract: Programmer's data that is transferred from a programming device (160) to a storage device (100) is initially stored in a memory device (120) of the storage device (100) by using a durable data-retention storage setup (210). After the storage device is embedded in a host device (170), the programmer's data is internally (i.e., in the storage device) read from the memory device and rewritten into the memory device by using a conventional storage setup (220). Using a durable data-retention storage setup may include temporarily (i.e., before the storage device is embedded in a host) operating selected memory cells (124) of the memory device as conventional single-bit per cell (SBC) cells or as unconventional multi-bit per cell (MBC) cells. After the storage device (100) is embedded in a host device (170), the programmer's data, or selected parts thereof, is read from the memory device (120) and rewritten into it by operating selected memory cells (126, 128) of the memory device as conventional MBC cells.Type: GrantFiled: October 5, 2009Date of Patent: June 3, 2014Assignee: Sandisk IL Ltd.Inventors: Shahar Bar-Or, Dan Inbar, Ori Moshe Stern, Yigal Eli
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Patent number: 8254170Abstract: Programmer's data is initially stored in a memory device of the storage device by using an MBC storage scheme. After the storage device is embedded in a host device, the programmer's data is internally read from the memory device by using conventional read reference voltages, and the number of erroneous data bits in the programmer's data is calculated. If the programmer's data includes an uncorrectable number of erroneous data bits, the programmer's data is iteratively reread by using unconventional read reference voltages with decreased levels. The iteration process, which includes decreasing the level of the read reference voltages and recalculating the number of erroneous data bits, is terminated when the number of erroneous data bits in the programmer's is less than or equals a predetermined number of erroneous data bits, after which the storage device restores the programmer's data and conventionally rewrites it into the memory device.Type: GrantFiled: August 25, 2009Date of Patent: August 28, 2012Assignee: Sandisk IL Ltd.Inventors: Yigal Eli, Mahmud Asfur, Shahar Bar-Or
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Publication number: 20110228604Abstract: Programmer's data is initially stored in a memory device of the storage device by using an MBC storage scheme. After the storage device is embedded in a host device, the programmer's data is internally read from the memory device by using conventional read reference voltages, and the number of erroneous data bits in the programmer's data is calculated. If the programmer's data includes an uncorrectable number of erroneous data bits, the programmer's data is iteratively reread by using unconventional read reference voltages with decreased levels. The iteration process, which includes decreasing the level of the read reference voltages and recalculating the number of erroneous data bits, is terminated when the number of erroneous data bits in the programmer's is less than or equals a predetermined number of erroneous data bits, after which the storage device restores the programmer's data and conventionally rewrites it into the memory device.Type: ApplicationFiled: August 25, 2009Publication date: September 22, 2011Applicant: SANDISK IL LTD.Inventors: Yigal Eli, Mahmud Asfur, Shahar Bar-Or
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Publication number: 20110199823Abstract: Programmer's data that is transferred from a programming device (160) to a storage device (100) is initially stored in a memory device (120) of the storage device (100) by using a durable data-retention storage setup (210). After the storage device is embedded in a host device (170), the programmer's data is internally (i.e., in the storage device) read from the memory device and rewritten into the memory device by using a conventional storage setup (220). Using a durable data-retention storage setup may include temporarily (i.e., before the storage device is embedded in a host) operating selected memory cells (124) of the memory device as conventional single-bit per cell (SBC) cells or as unconventional multi-bit per cell (MBC) cells. After the storage device (100) is embedded in a host device (170), the programmer's data, or selected parts thereof, is read from the memory device (120) and rewritten into it by operating selected memory cells (126, 128) of the memory device as conventional MBC cells.Type: ApplicationFiled: October 5, 2009Publication date: August 18, 2011Applicant: SANDISK IL LTD.Inventors: Shahar Bar-or, Dan Inbar, Ori Moshe Stern, Yigal Eli