Patents by Inventor Yigal Zemach

Yigal Zemach has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7107580
    Abstract: A simulator includes a binary translator to translate target code into host instructions to be executed on a host processor. To identify target instructions which may be modified by self-modifying code, the simulator determines whether a target instruction to be translated resides in a writeable page, and if so, inserts a run-time check into a translation cache along with translated instructions corresponding to such target instructions.
    Type: Grant
    Filed: January 7, 2003
    Date of Patent: September 12, 2006
    Assignee: Intel Corporation
    Inventors: Yigal Zemach, Alex Skaletsky
  • Patent number: 7000226
    Abstract: Mapping of exception masks between source and target architectures with different numbers of exception masks enables a binary translator to translate code from the source to the target architecture and to determine an appropriate state for the source architecture if an exception is raised when executing the translated code.
    Type: Grant
    Filed: January 2, 2002
    Date of Patent: February 14, 2006
    Assignee: Intel Corporation
    Inventors: Baiming Gao, Yun Wang, Yigal Zemach, Orna Etzion, Jianhui Li
  • Publication number: 20040133884
    Abstract: A simulator includes a binary translator to translate target code into host instructions to be executed on a host processor. To identify target instructions which may be modified by self-modifying code, the simulator determines whether a target instruction to be translated resides in a writeable page, and if so, inserts a run-time check into a translation cache along with translated instructions corresponding to such target instructions.
    Type: Application
    Filed: January 7, 2003
    Publication date: July 8, 2004
    Inventors: Yigal Zemach, Alex Skaletsky
  • Publication number: 20030126419
    Abstract: Mapping of exception masks between source and target architectures with different numbers of exception masks enables a binary translator to translate code from the source to the target architecture and to determine an appropriate state for the source architecture if an exception is raised when executing the translated code.
    Type: Application
    Filed: January 2, 2002
    Publication date: July 3, 2003
    Inventors: Baiming Gao, Yun Wang, Yigal Zemach, Orna Etzion, Jianhui Li