Patents by Inventor Yiguang Yan

Yiguang Yan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • SYSTEM AND METHOD FOR PERFORMING DEFORMATION AND STRESS ANALYSIS MODELING IN A VIRTUAL FABRICATION ENVIRONMENT
    Publication number: 20230409775
    Abstract: Embodiments of the present invention provide the ability to perform deformation and stress analysis modeling in a virtual fabrication environment. More particularly, embodiments enable the virtual fabrication environment to model deformation and stress analysis directly from a voxel-based model without requiring generation of an interface conforming mesh. Stress fields for semiconductor device structures may be determined at designated points in the process sequence used to fabricate the semiconductor device.
    Type: Application
    Filed: October 14, 2021
    Publication date: December 21, 2023
    Inventors: Gonzalo Feijoo, Yiguang Yan, Daniel Faken, Kenneth B. Greiner
  • System and method for electrical behavior modeling in a 3D virtual fabrication environment
    Patent number: 10762267
    Abstract: Modeling of electrical behavior during the virtual fabrication of a semiconductor device structure is discussed. Electrical behavior occurring in a designated region of a semiconductor device structure may be determined during the virtual fabrication process. For example, resistance or capacitance values may be determined within a modeling domain of interest.
    Type: Grant
    Filed: May 30, 2017
    Date of Patent: September 1, 2020
    Assignee: Coventor, Inc.
    Inventors: Mattan Kamon, Kenneth B. Greiner, David M. Fried, Vasanth Allampalli, Yiguang Yan
  • SYSTEM AND METHOD FOR ELECTRICAL BEHAVIOR MODELING IN A 3D VIRTUAL FABRICATION ENVIRONMENT
    Publication number: 20170344683
    Abstract: Modeling of electrical behavior during the virtual fabrication of a semiconductor device structure is discussed. Electrical behavior occurring in a designated region of a semiconductor device structure may be determined during the virtual fabrication process. For example, resistance or capacitance values may be determined within a modeling domain of interest.
    Type: Application
    Filed: May 30, 2017
    Publication date: November 30, 2017
    Inventors: Mattan Kamon, Kenneth B. Greiner, David M. Fried, Vasanth Allampalli, Yiguang Yan