Patents by Inventor Yih-Chen Su

Yih-Chen Su has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11906897
    Abstract: A reflective mask includes a reflective multilayer over a substrate, a capping layer over the reflective multilayer, an absorber layer over the capping layer and including a top surface, and a protection layer directly on the top surface of the absorber layer. The absorber layer is formed of a first material and the protection layer is formed of a second material that is less easily to be oxidized than the first material.
    Type: Grant
    Filed: June 17, 2021
    Date of Patent: February 20, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Pei-Cheng Hsu, Yih-Chen Su, Chi-Kuang Tsai, Ta-Cheng Lien, Tzu Yi Wang, Jong-Yuh Chang, Hsin-Chang Lee
  • Patent number: 11852966
    Abstract: A lithography mask includes a substrate, a reflective structure disposed over a first side of the substrate, and a patterned absorber layer disposed over the reflective structure. The lithography mask includes a first region and a second region that surrounds the first region in a top view. The patterned absorber layer is located in the first region. A substantially non-reflective material is located in the second region. The lithography mask is formed by forming a reflective structure over a substrate, forming an absorber layer over the reflective structure, defining a first region of the lithography mask, and defining a second region of the lithography mask. The defining of the first region includes patterning the absorber layer. The second region is defined to surround the first region in a top view. The defining of the second region includes forming a substantially non-reflective material in the second region.
    Type: Grant
    Filed: June 7, 2021
    Date of Patent: December 26, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chin-Hsiang Lin, Chien-Cheng Chen, Hsin-Chang Lee, Chia-Jen Chen, Pei-Cheng Hsu, Yih-Chen Su, Gaston Lee, Tran-Hui Shen
  • Publication number: 20230384693
    Abstract: A method of treating a surface of a reticle includes retrieving a reticle from a reticle library and transferring the reticle to a treatment device. The surface of the reticle is treated in the treatment device by irradiating the surface of the reticle UV radiation while ozone fluid is over the surface of the reticle for a predetermined irradiation time. After the treatment, the reticle is transferred to an exposure device for lithography operation to generate a photo resist pattern on a wafer. A surface of the wafer is imaged to generate an image of the photo resist pattern on the wafer. The generated image of the photo resist pattern is analyzed to determine critical dimension uniformity (CDU) of the photo resist pattern. The predetermined irradiation time is increased if the CDU does not satisfy a threshold CDU.
    Type: Application
    Filed: August 10, 2023
    Publication date: November 30, 2023
    Inventors: Yih-Chen SU, Tzu-Yi WANG, Ta-Cheng LIEN
  • Publication number: 20210311383
    Abstract: A reflective mask includes a reflective multilayer over a substrate, a capping layer over the reflective multilayer, an absorber layer over the capping layer and including a top surface, and a protection layer directly on the top surface of the absorber layer. The absorber layer is formed of a first material and the protection layer is formed of a second material that is less easily to be oxidized than the first material.
    Type: Application
    Filed: June 17, 2021
    Publication date: October 7, 2021
    Inventors: Pei-Cheng Hsu, Yih-Chen Su, Chi-Kuang Tsai, Ta-Cheng Lien, Tzu Yi Wang, Jong-Yuh Chang, Hsin-Chang Lee
  • Publication number: 20210294203
    Abstract: A lithography mask includes a substrate, a reflective structure disposed over a first side of the substrate, and a patterned absorber layer disposed over the reflective structure. The lithography mask includes a first region and a second region that surrounds the first region in a top view. The patterned absorber layer is located in the first region. A substantially non-reflective material is located in the second region. The lithography mask is formed by forming a reflective structure over a substrate, forming an absorber layer over the reflective structure, defining a first region of the lithography mask, and defining a second region of the lithography mask. The defining of the first region includes patterning the absorber layer. The second region is defined to surround the first region in a top view. The defining of the second region includes forming a substantially non-reflective material in the second region.
    Type: Application
    Filed: June 7, 2021
    Publication date: September 23, 2021
    Inventors: Chin-Hsiang Lin, Chien-Cheng Chen, Hsin-Chang Lee, Chia-Jen Chen, Pei-Cheng Hsu, Yih-Chen Su, Gaston Lee, Tran-Hui Shen
  • Patent number: 11048158
    Abstract: A method comprises receiving a workpiece that includes a substrate having a low temperature expansion material, a reflective multilayer over the substrate, a capping layer over the reflective multilayer, and an absorber layer over the capping layer. The method further comprises patterning the absorber layer to provide first trenches corresponding to circuit patterns on a wafer, and patterning the absorber layer, the capping layer, and the reflective multilayer to provide second trenches corresponding to a die boundary area on the wafer, thereby providing an extreme ultraviolet lithography (EUVL) mask. The method further comprises treating the EUVL mask with a treatment chemical that prevents exposed surfaces of the absorber layer from oxidation.
    Type: Grant
    Filed: April 18, 2018
    Date of Patent: June 29, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Pei-Cheng Hsu, Yih-Chen Su, Chi-Kuang Tsai, Ta-Cheng Lien, Tzu Yi Wang, Jong-Yuh Chang, Hsin-Chang Lee
  • Patent number: 11029593
    Abstract: A lithography mask includes a substrate, a reflective structure disposed over a first side of the substrate, and a patterned absorber layer disposed over the reflective structure. The lithography mask includes a first region and a second region that surrounds the first region in a top view. The patterned absorber layer is located in the first region. A substantially non-reflective material is located in the second region. The lithography mask is formed by forming a reflective structure over a substrate, forming an absorber layer over the reflective structure, defining a first region of the lithography mask, and defining a second region of the lithography mask. The defining of the first region includes patterning the absorber layer. The second region is defined to surround the first region in a top view. The defining of the second region includes forming a substantially non-reflective material in the second region.
    Type: Grant
    Filed: October 22, 2019
    Date of Patent: June 8, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chin-Hsiang Lin, Chien-Cheng Chen, Hsin-Chang Lee, Chia-Jen Chen, Pei-Cheng Hsu, Yih-Chen Su, Gaston Lee, Tran-Hui Shen
  • Patent number: 10866504
    Abstract: A lithography mask includes a substrate, a reflective structure disposed over a first side of the substrate, and a patterned absorber layer disposed over the reflective structure. The lithography mask includes a first region and a second region that surrounds the first region in a top view. The patterned absorber layer is located in the first region. A substantially non-reflective material is located in the second region. The lithography mask is formed by forming a reflective structure over a substrate, forming an absorber layer over the reflective structure, defining a first region of the lithography mask, and defining a second region of the lithography mask. The defining of the first region includes patterning the absorber layer. The second region is defined to surround the first region in a top view. The defining of the second region includes forming a substantially non-reflective material in the second region.
    Type: Grant
    Filed: December 22, 2017
    Date of Patent: December 15, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chin-Hsiang Lin, Chien-Cheng Chen, Hsin-Chang Lee, Chia-Jen Chen, Pei-Cheng Hsu, Yih-Chen Su, Gaston Lee, Tran-Hui Shen
  • Publication number: 20200050098
    Abstract: A lithography mask includes a substrate, a reflective structure disposed over a first side of the substrate, and a patterned absorber layer disposed over the reflective structure. The lithography mask includes a first region and a second region that surrounds the first region in a top view. The patterned absorber layer is located in the first region. A substantially non-reflective material is located in the second region. The lithography mask is formed by forming a reflective structure over a substrate, forming an absorber layer over the reflective structure, defining a first region of the lithography mask, and defining a second region of the lithography mask. The defining of the first region includes patterning the absorber layer. The second region is defined to surround the first region in a top view. The defining of the second region includes forming a substantially non-reflective material in the second region.
    Type: Application
    Filed: October 22, 2019
    Publication date: February 13, 2020
    Inventors: Chin-Hsiang Lin, Chien-Cheng Chen, Hsin-Chang Lee, Chia-Jen Chen, Pei-Cheng Hsu, Yih-Chen Su, Gaston Lee, Tran-Hui Shen
  • Publication number: 20190324364
    Abstract: A method comprises receiving a workpiece that includes a substrate having a low temperature expansion material, a reflective multilayer over the substrate, a capping layer over the reflective multilayer, and an absorber layer over the capping layer. The method further comprises patterning the absorber layer to provide first trenches corresponding to circuit patterns on a wafer, and patterning the absorber layer, the capping layer, and the reflective multilayer to provide second trenches corresponding to a die boundary area on the wafer, thereby providing an extreme ultraviolet lithography (EUVL) mask. The method further comprises treating the EUVL mask with a treatment chemical that prevents exposed surfaces of the absorber layer from oxidation.
    Type: Application
    Filed: April 18, 2018
    Publication date: October 24, 2019
    Inventors: Pei-Cheng Hsu, Yih-Chen Su, Chi-Kuang Tsai, Ta-Cheng Lien, Tzu Yi Wang, Jong-Yuh Chang, Hsin-Chang Lee
  • Publication number: 20190196322
    Abstract: A lithography mask includes a substrate, a reflective structure disposed over a first side of the substrate, and a patterned absorber layer disposed over the reflective structure. The lithography mask includes a first region and a second region that surrounds the first region in a top view. The patterned absorber layer is located in the first region. A substantially non-reflective material is located in the second region. The lithography mask is formed by forming a reflective structure over a substrate, forming an absorber layer over the reflective structure, defining a first region of the lithography mask, and defining a second region of the lithography mask. The defining of the first region includes patterning the absorber layer. The second region is defined to surround the first region in a top view. The defining of the second region includes forming a substantially non-reflective material in the second region.
    Type: Application
    Filed: December 22, 2017
    Publication date: June 27, 2019
    Inventors: Chin-Hsiang Lin, Chien-Cheng Chen, Hsin-Chang Lee, Chia-Jen Chen, Pei-Cheng Hsu, Yih-Chen Su, Gaston Lee, Tran-Hui Shen
  • Patent number: 8916482
    Abstract: A method of making a lithography mask with a stress-relief treatment is disclosed. The method includes providing a substrate and depositing an opaque layer on the substrate. The opaque layer is patterned to form a patterned mask. A stress-relief treatment is applied to the patterned mask by using an radiation exposure.
    Type: Grant
    Filed: April 2, 2012
    Date of Patent: December 23, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hsin-Chang Lee, Yun-Yue Lin, Hung-Chang Hsieh, Chia-Jen Chen, Yih-Chen Su, Ta-Cheng Lien, Anthony Yen
  • Publication number: 20130260573
    Abstract: A method of making a lithography mask with a stress-relief treatment is disclosed. The method includes providing a substrate and depositing an opaque layer on the substrate. The opaque layer is patterned to form a patterned mask. A stress-relief treatment is applied to the patterned mask by using an radiation exposure.
    Type: Application
    Filed: April 2, 2012
    Publication date: October 3, 2013
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hsin-Chang Lee, Yun-Yue Lin, Hung-Chang Hsieh, Chia-Jen Chen, Yih-Chen Su, Ta-Cheng Lien, Anthony Yen
  • Publication number: 20090258159
    Abstract: A method includes forming an absorption material layer on a mask; applying a plasma treatment to the mask to reduce chemical contaminants after the forming of the absorption material layer; performing a chemical cleaning process of the mask; and performing a gas injection to the mask.
    Type: Application
    Filed: April 10, 2008
    Publication date: October 15, 2009
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yih-Chen Su, Ting-Hao Hsu, Sheng-Chi Chin, Heng-Jen Lee, Hung Chang Hsieh, Yao-Ching Ku
  • Publication number: 20070012336
    Abstract: A multi-sub-process cleaning procedure cleans phase shift photomasks and other photomasks and Mo-containing surfaces. In one embodiment, vacuum ultraviolet (VUV) light produced by an Xe2 excimer laser converts oxygen to ozone that is used in a first cleaning operation. The VUV/ozone clean may be followed by a wet SC1 chemical clean and the two-sub-process cleaning procedure reduces phase-shift loss and increases transmission. In another embodiment, the first sub-process may use other means to form a molybdenum oxide on the Mo-containing surface. In another embodiment, the multi-sub-process cleaning operation provides a wet chemical clean such as SC1 or SPM or both, followed by a further chemical or physical treatment such as ozone, baking or electrically ionized water.
    Type: Application
    Filed: March 28, 2006
    Publication date: January 18, 2007
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yih-Chen Su, Chih-Cheng Lin, Tung Kang, Hung Hsieh
  • Publication number: 20070012335
    Abstract: A multi-step cleaning procedure cleans phase shift photomasks and other photomasks and Mo-containing surfaces. In one embodiment, vacuum ultraviolet (VUV) light produced by an Xe2 excimer laser converts oxygen to ozone that is used in a first cleaning operation. The VUV/ozone clean may be followed by a wet SC1 chemical clean and the two-step cleaning procedure reduces phase-shift loss and increases transmission. In another embodiment, the first step may use other means to form a molybdenum oxide on the Mo-containing surface. In another embodiment, the multi-step cleaning operation provides a wet chemical clean such as SC1 or SPM or both, followed by a further chemical or physical treatment such as ozone, baking or electrically ionized water.
    Type: Application
    Filed: July 18, 2005
    Publication date: January 18, 2007
    Inventors: Hsiao Chang, Tsun-Cheng Tang, Fei-Gwo Tsai, Tzu-Li Lee, Chien-Ming Chiu, Jang Lee, Yih-Chen Su, Chih-Cheng Lin, Tung Kang, Hung Hsieh
  • Patent number: 6962878
    Abstract: A method for reducing the dimension of a patterned organic photoresist area by reducing the pressure of a reactive environment surrounding the patterned photoresist to cause outgasing. The outgased materials CxHyOz are then decomposed in the reactive environment leaving the outgased photoresist porous. The environment surrounding the patterned photoresist is then increased to atmospheric pressure, which compresses or shrinks the porous photoresist. Photoresist lines having a dimension as small as about 0.085 ?m can be obtained.
    Type: Grant
    Filed: April 17, 2003
    Date of Patent: November 8, 2005
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yih-Chen Su, Chao-Tzung Tsai
  • Publication number: 20040209480
    Abstract: A method for reducing the dimension of a patterned organic photoresist area by reducing the pressure of a reactive environment surrounding the patterned photoresist to cause outgasing. The outgased materials CxHyOz are then decomposed in the reactive environment leaving the outgased photoresist porous. The environment surrounding the patterned photoresist is then increased to atmospheric pressure, which compresses or shrinks the porous photoresist. Photoresist lines having a dimension as small as about 0.085 &mgr;m can be obtained.
    Type: Application
    Filed: April 17, 2003
    Publication date: October 21, 2004
    Inventors: Yih-Chen Su, Chao-Tzung Tsai