Patents by Inventor Yih Song Chiu

Yih Song Chiu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9887095
    Abstract: The present disclosure provides one embodiment of an etch system. The etch system includes a tank designed to hold an etch solution for etching; a silicon monitor configured to measure silicon concentration of the etch solution; a drain module coupled to the tank and being operable to drain the etch solution; and a supply module being operable to fill in the tank with a fresh etch solution.
    Type: Grant
    Filed: March 12, 2014
    Date of Patent: February 6, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Fu Yi Chang, Yih-Song Chiu, Shao-Yen Ku
  • Publication number: 20140273303
    Abstract: The present disclosure provides one embodiment of an etch system. The etch system includes a tank designed to hold an etch solution for etching; a silicon monitor configured to measure silicon concentration of the etch solution; a drain module coupled to the tank and being operable to drain the etch solution; and a supply module being operable to fill in the tank with a fresh etch solution.
    Type: Application
    Filed: March 12, 2014
    Publication date: September 18, 2014
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Fu-Yi Chang, Yih-Song Chiu, Shao-Yen Ku
  • Patent number: 8049213
    Abstract: A method of measuring dimensional characteristics includes providing a substrate and forming a reflective layer over the substrate. A dielectric layer is then formed over the reflective layer. The dielectric layer includes a grating pattern and a resistivity test line inset in a transparent region. Radiation is then directed onto the dielectric layer so that some of the radiation is transmitted through the transparent region to the reflective layer. A radiation pattern is then detected from the radiation reflected and scattered by the metal grating pattern. The radiation pattern is analyzed to determine a first dimensional information. Then the resistance of the resistivity test line is measured, and that resistance is analyzed to determine a second dimensional information. The first and second dimensional informations are then compared.
    Type: Grant
    Filed: December 18, 2007
    Date of Patent: November 1, 2011
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ching-Chung Su, Yi-Wei Chiu, Tzu Chan Weng, Yih Song Chiu, Pin Chia Su, Chih-Cherng Jeng, Kuo-Hsiu Wei
  • Publication number: 20100240220
    Abstract: A process of stripping a patterned photoresist layer and removing a dielectric liner includes performing an oxygen-containing plasma dry etch process and performing a fluorine-containing plasma dry etch process in the same reaction chamber at a process temperature less than 120° C.
    Type: Application
    Filed: March 11, 2010
    Publication date: September 23, 2010
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yi-Wei CHIU, Yih Song CHIU, Tzu Chan WENG, Jeng Chang HER
  • Publication number: 20090152545
    Abstract: A method of measuring dimensional characteristics includes providing a substrate and forming a reflective layer over the substrate. A dielectric layer is then formed over the reflective layer. The dielectric layer includes a grating pattern and a resistivity test line inset in a transparent region. Radiation is then directed onto the dielectric layer so that some of the radiation is transmitted through the transparent region to the reflective layer. A radiation pattern is then detected from the radiation reflected and scattered by the metal grating pattern. The radiation pattern is analyzed to determine a first dimensional information. Then the resistance of the resistivity test line is measured, and that resistance is analyzed to determine a second dimensional information. The first and second dimensional informations are then compared.
    Type: Application
    Filed: December 18, 2007
    Publication date: June 18, 2009
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ching-Chung Su, Yi-Wei Chiu, Tzu-Chan Weng, Yih Song Chiu, Pin Chia Su, Chih-Cherng Jeng, Kuo-Hsiu Wei
  • Patent number: 7064085
    Abstract: A feed-forward method and apparatus for controlling spacer width measures spacer width during processing then further processes the spacers in a spacer width adjustment operation to achieve a desired final spacer width. Silicon nitride spacers may be measured after plasma etching and the measured spacer width is automatically compared to the final desired spacer width and a time for further processing is calculated based on a correlation between processing time and spacer width loss. Using computer interface manufacturing, the measured spacer width data is provided to a computer that performs the calculation and provides the further processing time or a recipe to the tool used for the spacer width adjustment operation. The spacer width adjustment operation may be wet processing in an SPM solution that oxidizes the spacers and an HF clean operation may be used to remove the oxidized portion and yield spacer widths within acceptable specification limits.
    Type: Grant
    Filed: July 20, 2004
    Date of Patent: June 20, 2006
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Yih-Song Chiu, Wen-Ting Tsai, Jao-Sheng Huang, Chen-Hsiang Leu
  • Publication number: 20060019479
    Abstract: A feed-forward method and apparatus for controlling spacer width measures spacer width during processing then further processes the spacers in a spacer width adjustment operation to achieve a desired final spacer width. Silicon nitride spacers may be measured after plasma etching and the measured spacer width is automatically compared to the final desired spacer width and a time for further processing is calculated based on a correlation between processing time and spacer width loss. Using computer interface manufacturing, the measured spacer width data is provided to a computer that performs the calculation and provides the further processing time or a recipe to the tool used for the spacer width adjustment operation. The spacer width adjustment operation may be wet processing in an SPM solution that oxidizes the spacers and an HF clean operation may be used to remove the oxidized portion and yield spacer widths within acceptable specification limits.
    Type: Application
    Filed: July 20, 2004
    Publication date: January 26, 2006
    Inventors: Yih-Song Chiu, Wen-Ting Tsai, Jao-Sheng Huang, Chen-Hsiang Leu
  • Patent number: 6972241
    Abstract: A method for forming shallow trench isolation (STI) structure including providing a substrate comprising an overlying hardmask layer; patterning the hardmask layer to form a hardmask layer opening for etching a trench through a substrate thickness portion; etching a trench according to the patterned overlying hardmask layer; carrying out a wet chemical oxidizing process to form an oxidized surface portion on the hardmask layer; carrying out a wet chemical etching process to remove at least a portion of the oxidized surface portion to form the hardmask opening having an enlarged width and the trench opening comprising rounded upper corners; and, forming a completed planarized STI structure filled with oxide.
    Type: Grant
    Filed: January 20, 2004
    Date of Patent: December 6, 2005
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yih Song Chiu, Jao Sheng Huang, Wen Ting Tsai, Chen Hsiang Leu
  • Publication number: 20010051408
    Abstract: Disclosed is a method for providing improved step coverage of deep trenches. A hard mask which constitutes a bottom silicon oxide layer and a top silicon nitride layer is formed on a substrate and patterned to form a opening. A deep trench extending into the substrate is formed through the opening. After both hard mask and substrate are patterned, HF vapor is performed to selectively etch away portions of hard mask. Then a deep trench with a ladder-like hard mask which has improved step coverage is obtained.
    Type: Application
    Filed: October 5, 1999
    Publication date: December 13, 2001
    Inventor: YIH-SONG CHIU