Abstract: Aspects of the disclosure provide an apparatus that includes interface circuitry with a serializer/deserializer (SERDES) circuit. The interface circuitry includes a receiving circuit that receives a signal that carries a sequence of digital values. The receiving circuit includes sampler circuit and a feedback equalization circuit. The sampler circuit includes an amplifying portion and a latch portion coupled at an intermediate node. The amplifying portion varies, with an amplifying gain, an intermediate signal at the intermediate node in response to an input signal to the sampler circuit, and the latch portion generates a digital output based on the intermediate signal at the intermediate node. The feedback equalization circuit is coupled to the intermediate node to vary the intermediate signal at the intermediate node based on a previous digital output from the latch portion of the sampler circuit.

Abstract: The present invention provides a dumpling automation machine for preparing dumpling-like food product, comprising a pressing and cutting device for dough pad, a filling injection device and a forming assembly, wherein the forming assembly comprises: a mold assembly for supporting a dough pad injected with a filling and maintaining the dough pad in an upright position; a pre-forming assembly for pre-pressing the upright dough pad to form a pre-pressed crest; and a forming assembly for pressing the pre-pressed crest to from a crest; wherein the mold assembly is configured to successively support the dough pad in different positions along a conveyor, and wherein in a pre-forming position, pre-bending portions on the two ends of the crest are formed by the pre-forming assembly, and in a forming position, the pre-bending portions are bent to form bending portion by a bending assembly.

Abstract: The present invention provides a dumpling automation machine for preparing dumpling-like food product, comprising a pressing and cutting device for dough pad, a filling injection device and a forming assembly, wherein the forming assembly comprises: a mold assembly for supporting a dough pad injected with a filling and maintaining the dough pad in an upright position; a pre-forming assembly for pre-pressing the upright dough pad to form a pre-pressed crest; and a forming assembly for pressing the pre-pressed crest to from a crest; wherein the mold assembly is configured to successively support the dough pad in different positions along a conveyor, and wherein in a pre-forming position, pre-bending portions on the two ends of the crest are formed by the pre-forming assembly, and in a forming position, the pre-bending portions are bent to form bending portion by a bending assembly.

Abstract: A phase-locked loop (PLL) with a decreased frequency tuning gain KVCO and a loop filter using capacitor multiplication technique to get high chip area efficiency. To get decreased frequency tuning gain, KVCO, a voltage to current converter in a voltage-controlled oscillator (VCO) in the PLL may comprise a first voltage to current converter and a second voltage to current converter. The trans-conductance of the first voltage to current converter is 1/? of that of the second voltage to current converter, wherein ?>1. The first voltage to current converter is controlled by an output voltage of a loop filter in the PLL, and the second voltage to current converter is controlled by a relative DC voltage, which may be the junction node between R1 and C1 in a loop filer of the PLL. Capacitor multiplication technique may use an auxiliary charge pump to charge or discharge the junction node between R1 and C1 inversely to the main charge pump.