Patents by Inventor Yijian QI

Yijian QI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10784976
    Abstract: A system and apparatus for obtaining clock synchronization of networked devices and related method are provided. Embodiments include a computer-implemented system, including a primary device having a first high accuracy timestamping assist (HATA) unit attached to a first physical layer; a first time stamping unit; a first clock control; a first medium access control layer connected to the first time stamping unit and the first physical layer via a medium independent interface. A secondary device includes a second HATA unit attached to a second physical layer; a second timestamping unit; a second clock control. The first and second HATA units are configured to detect a departure time, an arrival time, or a combination thereof of a first alignment marker over transmitter serializer and receiver deserializer interfaces of a data transmission between the primary device and the secondary device.
    Type: Grant
    Filed: November 20, 2018
    Date of Patent: September 22, 2020
    Assignee: GLOBALFOUNDRlES INC.
    Inventors: Kai Yang, Adrian Butter, Bin Sun, Yijian Qi, Jilei Yin
  • Publication number: 20200162179
    Abstract: A system and apparatus for obtaining clock synchronization of networked devices and related method are provided. Embodiments include a computer-implemented system, including a primary device having a first high accuracy timestamping assist (HATA) unit attached to a first physical layer; a first time stamping unit; a first clock control; a first medium access control layer connected to the first time stamping unit and the first physical layer via a medium independent interface. A secondary device includes a second HATA unit attached to a second physical layer; a second timestamping unit; a second clock control. The first and second HATA units are configured to detect a departure time, an arrival time, or a combination thereof of a first alignment marker over transmitter serializer and receiver deserializer interfaces of a data transmission between the primary device and the secondary device.
    Type: Application
    Filed: November 20, 2018
    Publication date: May 21, 2020
    Inventors: Kai YANG, Adrian BUTTER, Bin SUN, Yijian QI, Jilei YIN