Abstract: The present disclosure relates to a device and a system for testing flatness. The device for testing flatness includes a base, a testing platform, and a ranging sensor. The testing platform is assembled on the base. The testing platform includes a supporting structure. The supporting structure is disposed on the side of the testing platform away from the base and is used to support a to-be-tested board. The structure matches the structure of the to-be-tested board. The ranging sensor is disposed on the side of the testing platform away from the base. After the to-be-tested board is placed on the testing platform, the ranging sensor is used to test distances between a number N of to-be-tested positions on the to-be-tested board and the ranging sensor, to obtain N pieces of distance information, and the N pieces of distance information are used to determine the flatness of the to-be-tested board, where N is an integer greater than 2.

Abstract: A method and composition for doped HTS tapes having directional flux pinning and critical current.

Abstract: A flyback converter is provided that compares a drain-to-source voltage of a synchronous rectifier switch transistor to a negative threshold voltage to detect whether the synchronous rectifier switch transistor has a partially-open or an open fault condition. The flyback converter also compares a gate terminal voltage of a gate driver to the synchronous rectifier switch transistor to a positive threshold voltage to detect whether the synchronous rectifier switch transistor has a gate open or a gate short-circuit fault condition.

Abstract: A flyback converter is provided that dynamically adjusts a drain threshold voltage for a current cycle of a synchronous rectifier switch transistor based upon operating conditions in a previous cycle of the synchronous rectifier switch transistor. A differential amplifier drives a gate voltage of the synchronous rectifier switch transistor during an on-time of the current cycle so that a drain voltage of the synchronous rectifier switch transistor equals the drain threshold voltage during a regulated portion of the current cycle.

Abstract: Read latency for a read operation to a host implementing a PRP/SGL buffer is reduced by generating an address table representing the linked-list structure defining the PRP/SGL buffer. The address table may be generated concurrently with reading of data referenced by the read command from a NAND storage device. A block table for tracking status of LBAs referenced by IO commands may include a reference to the address table which is used to transfer LBAs to host memory as soon as the address table is complete and a block of data referenced by an LBA has been read from the NAND storage device.

Abstract: A first feature map corresponding to a first image and a second feature map corresponding to a second image are acquired by performing feature extraction respectively on the first image and the second image according to each scale of preset multiple scales. Similarity between the first feature map and the second feature map located at any two spatial locations is computed corresponding to a target scale combination of the preset multiple scales. An undirected graph is established according to similarities corresponding to respective target scale combinations. The undirected graph is input to a graph neural network that is pre-established. It is determined, according to an output result output by the graph neural network, whether the second image matches the first image.

Abstract: A PCIe architecture is disclosed incorporating a controller memory buffer (CMB). Write data is written to the CMB and is not read out for processing upon receiving a write command for the write data. The data is read out of the CMB and processed to obtain processed data upon receiving feedback from a NAND channel controller. The processed data may be written directly to the NAND channel controller or may be written to a light write buffer that is read by the NAND channel controller. The processed data may be written to a light write buffer functioning as a cut through buffer.

Abstract: A method for recommending collocating dress includes: obtaining a first dress image from an input image; obtaining a first dress feature of the first dress image; obtaining, based on the first dress feature, a second dress feature matching the first dress feature from a collocation database, the second dress feature being a dress feature of a second dress image; and obtaining, based on the second dress feature, a dress image identical to and/or similar to the second dress image from a recommendation database as a collocating dress image. Based on the method in the embodiments, at least one collocation recommendation is provided for a dress image, and the recommendation result is more objective and is more in accordance with user demands.

Abstract: A flyback converter is provided that dynamically adjusts a drain threshold voltage for a current cycle of a synchronous rectifier switch transistor based upon operating conditions in a previous cycle of the synchronous rectifier switch transistor. A differential amplifier drives a gate voltage of the synchronous rectifier switch transistor during an on-time of the current cycle so that a drain voltage of the synchronous rectifier switch transistor equals the drain threshold voltage during a regulated portion of the current cycle.

Abstract: A flyback converter is provided that detects a load-transient-produced increase in the output current to more quickly detect and respond to the load transient.

Abstract: A flyback converter is provided that compares a drain-to-source voltage of a synchronous rectifier switch transistor to a negative threshold voltage to detect whether the synchronous rectifier switch transistor has a partially-open or an open fault condition. The flyback converter also compares a gate terminal voltage of a gate driver to the synchronous rectifier switch transistor to a positive threshold voltage to detect whether the synchronous rectifier switch transistor has a gate open or a gate short-circuit fault condition.

Abstract: A flyback converter is provided that dynamically adjusts a drain threshold voltage for a current cycle of a synchronous rectifier switch transistor based upon operating conditions in a previous cycle of the synchronous rectifier switch transistor. A differential amplifier drives a gate voltage of the synchronous rectifier switch transistor during an on-time of the current cycle so that a drain voltage of the synchronous rectifier switch transistor equals the drain threshold voltage during a regulated portion of the current cycle.

Abstract: A gate driving unit, a method for driving the same, a gate driving circuitry and a display module are provided. The gate driving unit includes: a shift register circuit configured to delay a phase of an input signal inputted by a signal input end under control of a first clock signal input end and a second clock signal input end to obtain a carry signal, and output the carry signal through a carry end; and a pulse width regulation circuit configured to regulate a pulse width of the carry signal under control of the enable end to obtain a gate drive signal, and output the gate drive signal through a gate drive signal output end.

Abstract: A switch detection circuit is provided that senses the voltage on a rectifying component for rectifying a secondary winding current through a secondary winding of a flyback converter's transformer to determine whether a power switch transistor attached to a primary winding of the transformer has ceased cycling.

Abstract: The present disclosure discloses a display substrate and a manufacturing thereof. The display substrate comprises a base substrate, a pixel defining layer formed on the base substrate, wherein the pixel defining layer is provided with an opening region comprising a bottom wall and at least one sidewall, wherein in the opening region, an edge of the bottom wall is provided with at least one hydrophilic inducing column, wherein at least one of the hydrophilic inducing column has a hydrophilic surface.

Abstract: A touch display panel includes: a plurality of electrode blocks arranged in an array and spaced apart in an active area; an inner common electrode line surrounding the active area and disposed in a non-active area, a spacing area being provided between the active area and a portion of the inner common electrode line located away from a side where a driving circuit area is located; a plurality of dummy touch driving electrode lines arranged in parallel and running through the active area, the plurality of dummy touch driving electrode lines arranged in parallel being in one-to-one correspondence with and electrically connected to at least electrode blocks close to the spacing area; and switch circuits disposed in the spacing area that are in one-to-one correspondence with the electrode blocks electrically connected to the dummy touch driving electrode lines.

Abstract: A power system and related methods provide sense resistor fault detection and safe operation of switching power converters and connected devices such as portable electronic devices powered by the switching power converter. The power system detects an open circuit or short circuit condition of the sense resistor and controls output current of the switching power converter to ensure safe operating conditions of the power system and connected equipment. The power system can also detect initial inrush current of the connected equipment and detect a duty cycle of the switching power converter to positively detect a short circuit condition of the sense resistor.

Abstract: A gate driving unit, a method for driving the same, a gate driving circuitry and a display module are provided. The gate driving unit includes: a shift register circuit configured to delay a phase of an input signal inputted by a signal input end under control of a first clock signal input end and a second clock signal input end to obtain a carry signal, and output the carry signal through a carry end; and a pulse width regulation circuit configured to regulate a pulse width of the carry signal under control of the enable end to obtain a gate drive signal, and output the gate drive signal through a gate drive signal output end.

Abstract: A flyback converter controller is provided with secondary-side controller that adjusts a discharge current form an output voltage rail during a communication period with a primary-side controller to maintain the output voltage within regulation.

Abstract: In one embodiment, a method includes receiving a unique identifier of a second user from a mobile client system of a first user after the second user requests to communicate with the first user, identifying the second user based on the unique identifier, retrieving multiple items of profile information of the second user, determining whether the unique identifier is in a list of blocked identifiers, and sending to the first user a notification that a communication request form the second user has been declined if the unique identifier is in the list of blocked identifiers. The method also includes sending the first user multiple items of profile information of the second user if the unique identifier is in the list of blocked identifiers.